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I went through the Schematic of analog components and the routing.
i see that 2 pins of same port connect to same AG.
if i am using same two pins how is that the the pins are identified individually .
Another question is that - are the analog componets spread across the entire chip or restricted to one part of the chip.
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PSoC 5LP
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There is an "Analog View" which will help you to understand how the analog parts are distributed over the chip In Creator 2.1 when a project is built open the pins-view and click on the "Analog"-tab below. Remember that routing an analog signal through the device has to be done differently (swritches) from digital signals (gates). This is the sole capability of Cypress's PSoCs to combine the analog world with the digital.
Connecting two pins (tieing trhem together) doubles the current to be drawn from them but of course they are normally not set individually, they are driven by the modules they are connected with. Of course you may add the individual currents, I think I saw an App-note increasing the precision of DACs in this way.
Bob
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Actually my question was, same port pins Ex. P0[0] and P0[4] connect to the same Analog Global.
I will use these two pins in my design.
How is that the PSoC is able to identify these two pins as different and not as same pin.
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I do not know exactly what you mean with distinguish the two pins from each other. Can you provide a schematic of what you mean? What is "Pins are connected to AG"?
The pins are connected (routed) as you specify and the connections internally are with switches having an internal resistance of 150 to 500 Ohms.
Bob
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Regarding the question about location on die of analog components.
Cypress to the best of my klnowledge has not revealed die layout
information to the public.
That being said general mixed signal designs generally speaking
do layout analog components in separate die areas from digital.
There are a number of isolation techniques employed, from power
buss separation to isolated well structures.
Creator has an analog viewer, but it is a routing viewer, not where
specifc analog components are located.
Regards, Dana.
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As far as two analog pins connected to same global. Thats permissable.
Depends on what you are doing in your design.
Here is an ap note on GPIO and how its routed, options,etc.
http://www.cypress.com/?rID=39974
Regards, Dana.