1 Reply Latest reply on Jul 30, 2012 2:44 PM by joel.brenner

    Sync slave FIFO dual EP issue

    joel.brenner

      Hi, I’m writing to the forum since I’m really confused about the association Thread-Socket for the GPIF sync FIFO interface. I used the Slave sync FIFO example (putting DMA channels on AUTO) as a starting point but I’m now unable to go ahead.

         

      My needs are:

         

      1)       EP1 working as IN and  OUT, transferring and reading data to and from the PPort using automatic DMA.

         

      2)       I then need a second endpoint EP2 working too  as IN and OUT

         

      EP1 is typically used to transfer big chunk of data and is accessed using async  data transfer (from the CyAPI point of view; not async GIPIF!) . This works perfectly and I’m able to send and receive data to/from the GPIF interface.

         

      In this case your selection was:

         

       

         

      #define CY_FX_EP_PRODUCER               0x01    /* EP 1 OUT */

         

      #define CY_FX_EP_CONSUMER               0x81    /* EP 1 IN */

         

       

         

      #define CY_FX_PRODUCER_USB_SOCKET    CY_U3P_UIB_SOCKET_PROD_1    /* USB Socket 1 is producer */

         

      #define CY_FX_CONSUMER_USB_SOCKET    CY_U3P_UIB_SOCKET_CONS_1    /* USB Socket 1 is consumer */

         

       

         

      #define CY_FX_PRODUCER_PPORT_SOCKET    CY_U3P_PIB_SOCKET_0    /* P-port Socket 0 is producer */

         

      #define CY_FX_CONSUMER_PPORT_SOCKET    CY_U3P_PIB_SOCKET_3    /* P-port Socket 3 is consumer */

         

       

         

      In your reference design you the set up the 2 DMA channels using :

         

       

         

         

          dmaCfg.prodSckId = CY_FX_PRODUCER_USB_SOCKET;

         

          dmaCfg.consSckId = CY_FX_CONSUMER_PPORT_SOCKET;

         

         

          apiRetStatus = CyU3PDmaChannelCreate (&glChHandleSlFifoUtoP, CY_U3P_DMA_TYPE_ AUTO, &dmaCfg);

         

      ..

         

       

         

      For the USB 2 FX3 channel and

         

         

          dmaCfg.prodSckId = CY_FX_PRODUCER_PPORT_SOCKET;

         

          dmaCfg.consSckId = CY_FX_CONSUMER_USB_SOCKET;

         

         

         apiRetStatus = CyU3PDmaChannelCreate (&glChHandleSlFifoPtoU, CY_U3P_DMA_TYPE_ AUTO, &dmaCfg);

         

       

         

      For the FX3 2 USB  DMA channel.

         

       

         

      First question: how maps the USB socket number to the Endpoint number. Looking at your example I should use CY_U3P_UIB_SOCKET_PROD_1    and CY_U3P_UIB_SOCKET_CONS_1    for EP 1 and  CY_U3P_UIB_SOCKET_PROD_2    and CY_U3P_UIB_SOCKET_CONS_2 for EP2,…  is this correct ?

         

      In order to set up a second    group of DMA channels I modified the above definition as following

         

       

         

      #define CY_FX_EP_PRODUCER               0x01    /* EP 1 OUT */

         

      #define CY_FX_EP_CONSUMER               0x81    /* EP 1 IN */

         

      #define CY_FX_EP_PRODUCER_NEW      0x02    /* EP 2 OUT */

         

      #define CY_FX_EP_CONSUMER_NEW     0x82    /* EP 1 IN */

         

       

         

      #define CY_FX_PRODUCER_USB_SOCKET    CY_U3P_UIB_SOCKET_PROD_1    /* USB Socket 1 is producer */

         

      #define CY_FX_CONSUMER_USB_SOCKET    CY_U3P_UIB_SOCKET_CONS_1    /* USB Socket 1 is consumer */

         

      #define CY_FX_PRODUCER_USB_SOCKET_NEW    CY_U3P_UIB_SOCKET_PROD_2    /* USB Socket 2 is producer */

         

      #define CY_FX_CONSUMER_USB_SOCKET_NEW   CY_U3P_UIB_SOCKET_CONS_2    /* USB Socket 2 is consumer */

         

       

         

      #define CY_FX_PRODUCER_PPORT_SOCKET    CY_U3P_PIB_SOCKET_0    /* P-port Socket 0 is producer */

         

      #define CY_FX_CONSUMER_PPORT_SOCKET    CY_U3P_PIB_SOCKET_3    /* P-port Socket 3 is consumer */

         

      #define CY_FX_PRODUCER_PPORT_SOCKET_NEW    CY_U3P_PIB_SOCKET_1    /* P-port Socket 1 is producer */

         

      #define CY_FX_CONSUMER_PPORT_SOCKET_NEW    CY_U3P_PIB_SOCKET_2    /* P-port Socket 2 is consumer */

         

       

         

      I then copied your code to set up the 2 new DMA channels:

         

       

         

         

          dmaCfg.prodSckId = CY_FX_PRODUCER_USB_SOCKET_NEW;

         

          dmaCfg.consSckId = CY_FX_CONSUMER_PPORT_SOCKET_NEW;

         

         

          apiRetStatus = CyU3PDmaChannelCreate (&glChHandleSlFifoUtoP_new, CY_U3P_DMA_TYPE_ AUTO, &dmaCfg_new);

         

      ..

         

       

         

      For the USB 2 FX3 channel and

         

         

          dmaCfg.prodSckId = CY_FX_PRODUCER_PPORT_SOCKET_NEW;

         

          dmaCfg.consSckId = CY_FX_CONSUMER_USB_SOCKET_NEW;

         

         

         apiRetStatus = CyU3PDmaChannelCreate (&glChHandleSlFifoPtoU_new, CY_U3P_DMA_TYPE_M AUTO, &dmaCfg_new);

         

       

         

       

         

      First question: is my socket mapping correct according to the description of what I need ?

         

      If yes, EP1 works perfectly both IN and OUT, but EP2 simply doesn’t.  In none of the directions…

         

       

         

      Do I’m missing something?  Any suggestion ?

         

       

         

      Thanks in advance, Joel

         

       

         

      P.S. I’m using a 2 bit addr 32 bit data sync GPIF slave fifo model (GPIF designer)

        • 1. Re: Sync slave FIFO dual EP issue
          joel.brenner

          Ah sorry, I completely forgot to mention what "doesn't work" means.

             

           

             

          If I set addr = 2 (soket 2/thread 2 GPIF sel) and I write 4 bytes to EP2 usign CmdEndPtOut->XferData(…) I’m able to write 2 times an XferData to FX3 ( since I’ve set up a DMA channel with 2 buffers) but then at the next XferData the operation aborts on timeout. Monitoring FlagA (which has been assigned to current thread FIFO_full/empty functionality) it remains low ergo the DMA doesn’t transfers the received data to the PPort.

             

          It seems somehow that the producer part in this case is working properly but there is something wrong on the DMA operation or on the egress part of the channel.

             

           

             

          Any evident mistake ?

             

           

             

          Thanks, Joel