5 Replies Latest reply on Aug 9, 2012 5:21 AM by sridharm_

    Hardware configuration

      NVl latch hold the hardware configuration of the device.


      At one part it is mentioned that Bootloader project sets all the hardware configuration using NVLs and bootloadable project cannot change it.....


      But bootloader project resets the device(software reset). After this reset bootloadable project can change the hardware configuration........


      i am confused ... what exactly is the app note talking about....

        • 1. Re: Hardware configuration

          WHICH appnote???



          • 2. Re: Hardware configuration

             The nonvolatile latches store basic device configuration settings; these settings are automatically applied at device reset time. only projects that are started from (hard) reset (Normal/Bootloader projects) incorporate NVL settings. But Bootloadable projects are not started from device reset – they are started from the Bootloader (soft reset).

            • 3. Re: Hardware configuration

              i am writing exactly the words in app note....




              Why do we need a reset to jump between the bootloader and the bootloadable projects?


              "PSoC 3 and PSoC 5 are enormously configurable devices. The bootloader allows you to change on-chip hardware resources as well as firmware. Due to its highly configurable architecture, hardware reconfiguration (placement, routing, functional) is possible only from a reset state. Therefore the bootloader requires a reset to jump between the bootloader and bootloadable projects."


              Anyone can explain this

              • 4. Re: Hardware configuration

                You are mixing the NVL with the configuration data stored in the "Registers" to configure devices, routes etc.


                When power is applied to a PSoC, long BEFORE the Reset interrupt is executed the question is: What logic state is applied to the pins? As default the pins are in high-z until programed during the configuration process which seems to be a rather safe solution (remember, a PSoC may control a 40-ton crane, it HAS to be save when starting the motors).


                When the high-z will not work for your application, you may change the behavour on a port-by-port basis and program the initial pin-state needed into an NVL. Now, when power is applied to the chip, in a very early stage of the rising edge of power (1.7V I think) the NVL-programmig specifies the pin-output.


                The "Project programming" ie. setting all the required registers, initial port-bits, routes and switches, modules and so on is done by a sequential copying of an area in  flash memory into the corresponding registers. This process is selectable to be done with DMA or by program and is, as you see, done under the control of the CPU after a hard reset. A soft reset is just a restart of main().


                Bootloading projects are copied into exactly that flash memory area, now at (hard) reset the "Project programming" is performed and the result is the PSoC with the new project running.





                • 5. Re: Hardware configuration

                  To add to Bob's comments, the Bootloader and Bootloadable are two completely independent projects and may or may not share resources. eg: The pins used in a bootloader project may be reused for a diff purpose in Bootloadable project. To achieve this, a soft reset is must.