6 Replies Latest reply on Aug 17, 2012 12:24 AM by prajith.cheerakkoda

    FIFO slave interface in auto mode

    gigin.jose

      Hi,

         

      I am working on slave FIFO intereface for FX2LP usb controller.  I am configuring the FIFO in auto mode. 

         

      Once the master gives the 8bit data to the slave FIFO bus (FD0-FD7), I am expecting the data to be commited to the USB endpoint buffer with the following code segment : 

         

      I am using EP2 as bulk in endpoint and I am disabling all other endpoints

         

       

         

      SYNCDELAY;                    // 

         

      EP2CFG = 0xE0;                // bulk endpoint and quad buffering

         

      SYNCDELAY;                    //

         

      EP6CFG &= 0x7F;          //clear valid bit 

         

      SYNCDELAY;

         

      EP4CFG &= 0x7F;                // clear valid bit

         

      SYNCDELAY;                    // 

         

      EP8CFG &= 0x7F;                // clear valid bit

         

      SYNCDELAY;

         

      FIFORESET = 0x80;             // activate NAK-ALL to avoid race conditions

         

      SYNCDELAY;                    // see TRM section 15.14

         

      FIFORESET = 0x02;             // reset, FIFO 2

         

      SYNCDELAY;                    // 

         

      FIFORESET = 0x04;             // reset, FIFO 4

         

      SYNCDELAY;                    // 

         

      FIFORESET = 0x06;             // reset, FIFO 6

         

      SYNCDELAY;                    // 

         

      FIFORESET = 0x08;             // reset, FIFO 8

         

      SYNCDELAY;                    // 

         

      FIFORESET = 0x00;             // deactivate NAK-ALL

         

      SYNCDELAY;                    // 

         

      EP2FIFOCFG = 0x08;            // AUTOIN=1, WORDWIDE=0

         

      SYNCDELAY;                    // 

         
              
         
          I am also configuring the buffer length as 512bytes as below:   
         
          
              EP2AUTOINLENH = 0x02;    
          
               SYNCDELAY;    
          
               EP2AUTOINLENL = 0x00;    
          
               SYNCDELAY;    
          
                
          
           Is this all required for passing the 8bit FIFO data from master to USB host. ? Can I read the data from master using any dotnet application as mentioned below :     
          
                
          
           len = 512;    
          
           byte[] buffer = new byte[len]    
          
           ret = myDevice.BulkInEndPt.XferData(ref buffer, ref len, false);    
          
                
          
           Since the master gives 8bit data, I am grounding the FD[8] to FD[15] lines through 10K resistor. So, should I explicitly disable the PORTD pins.     
          
                
          
           In my case, I am interfacing an 8bit cmos camera. As soon as I download the code into FX2LP RAM, the signal strength from the camera is getting too low so that I am getting a black image data as soon as I try to read the USB data from the dotnet appplication.     
          
           And also even though the FD8 to FD15 lines are grounded, I get a high voltage lvel on some of these lines.     
          
           Why are the are the camera interface lines getting low as soon as I start running the code ? And also, Why am I observing a voltage level on FD8 to FD15 lines even though it remains grounded ?     
          
                
          
           Thank You