BCM20732S SPI problem SDK 1.x BCM20736S SDK 2.x

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Anonymous
Not applicable

Hello All,

Having a problem with the SPI interface on the BCM20732S (and BCM20736S).  We had this working previously with different IO on the BCM20732S (same chip) on a past project.  The only activity we see now is a 25.5us low pulse on the SPI CS.  Any ideas?  TIA

Using these NEW pins (highlighted in yellow):

briana_spi_master_pic.png

Logic Analyzer probe of the SPI signals.  SPI Clock is always low.  MISO is always low, MOSI is always high:

logic16_ble_spi.png




Older code & Schematic snippets (working):

Spi init-

// SPI:

#define CS1_PORT 1 // use P26 for SPI_CS1_LED1

#define CS1_PIN 10

#define CS2_PORT 0 // use P2 for SPI_CS2_LED2

#define CS2_PIN 2

#define SPEED 8000000 // Use 8M speed

#define CS_ASSERT 0 // CS is active low

#define CS_DEASSERT        1

void DW_Gateway_SpiInit(void)

{

    //  Use SPIFFY2 interface as master

    spi2PortConfig.masterOrSlave = MASTER2_CONFIG;

    //  pull for MISO for master, MOSI/CLOCK/CS if slave mode

    spi2PortConfig.pinPullConfig = INPUT_PIN_PULL_UP;

    //  Use P3 for CLK, P0 for MOSI and P1 for MISO

    spi2PortConfig.spiGpioConfig = MASTER2_P03_CLK_P00_MOSI_P01_MISO;

    //  Initialize SPIFFY2 instance

    spiffyd_init(SPIFFYD_2);

    //  Define this to the Port/Pin you want to use for CS. // Port = P#/16 and PIN = P# % 16

    //  Configure the CS pin and deassert it intially. If enabling output, you only need to configure once. Use gpio_setPinOutput to toggle value being o/p

gpio_configurePin(CS1_PORT, CS1_PIN, GPIO_OUTPUT_ENABLE | GPIO_INPUT_DISABLE, CS_DEASSERT);

gpio_configurePin(CS2_PORT, CS2_PIN, GPIO_OUTPUT_ENABLE | GPIO_INPUT_DISABLE, CS_DEASSERT);

    //  Configure the SPIFFY2 HW block

    spiffyd_configure(SPIFFYD_2, SPEED, SPI_MSB_FIRST, SPI_SS_ACTIVE_LOW, SPI_MODE_0); // Originally SPI_MODE_3, but problems with Freq Synth Writes

    // Deassert chip selects

gpio_setPinOutput(CS1_PORT, CS1_PIN, CS_DEASSERT);

gpio_setPinOutput(CS2_PORT, CS2_PIN, CS_DEASSERT);

}



new_ble.png




Newer code & Schematic snippets (not working):

Spi init-

// SPI:

#define CS1_PORT 1 // use P26 for SPI_CS to accelerometer

#define CS1_PIN 10

#define CS2_PORT 0 // use P8 for SPI_USB_CSn to USB/uController

#define CS2_PIN 8

void Macnica_Mpression_SpiInit(void)

{

gpio_configurePin(0, 0, GPIO_OUTPUT_DISABLE | GPIO_INPUT_DISABLE, CS_DEASSERT);

gpio_configurePin(0, 1, GPIO_OUTPUT_DISABLE | GPIO_INPUT_DISABLE, CS_DEASSERT);

gpio_configurePin(0, 2, GPIO_OUTPUT_DISABLE | GPIO_INPUT_DISABLE, CS_DEASSERT);

gpio_setPinOutput(0, 0, CS_DEASSERT);

gpio_setPinOutput(0, 1, CS_DEASSERT);

gpio_setPinOutput(0, 2, CS_DEASSERT);

    //  Use SPIFFY2 interface as master

    spi2PortConfig.masterOrSlave = MASTER2_CONFIG;

    //  pull for MISO for master, MOSI/CLOCK/CS if slave mode

    spi2PortConfig.pinPullConfig = INPUT_PIN_PULL_UP;

    //  Use P3 for CLK, P0 for MOSI and P1 for MISO

    spi2PortConfig.spiGpioConfig = MASTER2_P24_CLK_P27_MOSI_P25_MISO;

    //  Initialize SPIFFY2 instance

    spiffyd_init(SPIFFYD_2);

    //  Define this to the Port/Pin you want to use for CS. // Port = P#/16 and PIN = P# % 16

    //  Configure the CS pin and deassert it intially. If enabling output, you only need to configure once. Use gpio_setPinOutput to toggle value being o/p

    gpio_configurePin(CS1_PORT, CS1_PIN, GPIO_OUTPUT_ENABLE | GPIO_INPUT_DISABLE, CS_DEASSERT);

gpio_configurePin(CS2_PORT, CS2_PIN, GPIO_OUTPUT_ENABLE | GPIO_INPUT_DISABLE, CS_DEASSERT);

    //  Configure the SPIFFY2 HW block

spiffyd_configure(SPIFFYD_2, SPEED, SPI_MSB_FIRST, SPI_SS_ACTIVE_LOW, SPI_MODE_0);

    // Deassert chip selects

    gpio_setPinOutput(CS1_PORT, CS1_PIN, CS_DEASSERT);

gpio_setPinOutput(CS2_PORT, CS2_PIN, CS_DEASSERT);

}

old_ble.png

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1 Solution
Anonymous
Not applicable

Hello Dkalva,

  Yes that is the correct method to disable the PUART.  If you use the SPI2 and PUART they have to both be on either the upper or lower PORTs.  P0-P7 or P24-P39.

Regards,

Frank

View solution in original post

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9 Replies
MichaelF_56
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I'll ask the developers to take a look at this Mike.

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Anonymous
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Hi,

I am working with mfenston on this project, In order to use SPI we had to disable PUART so i modified peripheral uart config to

// -------------------------------------------------------------------------------

// Peripheral UART Configuration

//

//

const BLE_PROFILE_PUART_CFG Macnica_Mpression_PUART_cfg =

{

    115200, // UINT32 baudrate;

    PUARTDISABLE |28,     // UINT8  TX pin

    PUARTDISABLE |31,     // UINT8  RX pin

};

Is this correct way of disabling UART?

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Anonymous
Not applicable

Hello Dkalva,

  Yes that is the correct method to disable the PUART.  If you use the SPI2 and PUART they have to both be on either the upper or lower PORTs.  P0-P7 or P24-P39.

Regards,

Frank

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Anonymous
Not applicable

Currently in our board UART1(PUART) is on the lower PORTS(P0-P2) and SPI is on the upper PORTS(P24-P27).Even after disabling UART1 we see that SPI Clock is low, MISO is low and MOSI is high.

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Anonymous
Not applicable

Hi Dkalva,

  I don't see anything that is jumping out as far as your configuration that would be causing a problem.  It sounds like you have new hardware from the prior SPI implementation.  I would recommend that you try to configure each of the Port Pins that you are wanting to use as Outputs and toggle them High/Low or some combination just to see that you are able to configure each Port pin and see that they are being toggled to first validate you truly have control of these pins.  A couple of notes regarding your setup...

1) One of your CS Ports needs to be setup as the FCO(input) you have both CS pins configured as outputs?

          Please refer to the spi_comm_master.c example in SDK1.1

2)  This same pin should be configured as an Interrupt.  Again see spi_comm_master example in SDK1.1.

3)   Be careful about touching P1 as this is the WP line of the EEPROM.

Try configuring the PORT pins individually and see if you can see them toggle and let us know.

Regards,

Frank

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Anonymous
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Hi fdroberts2,

I removed spiint() in my code and tried to configure 4 port pins and tried to toggle them but in logic analyzer pins weren't toggling, even chip select wasn't  toggling. But if i include spiint() and configure chip select and  i was able to toggle it.

1) Our board has two CS Ports for two slave devices and are configured as outputs.

2) Is FCO(input) necessary for spi?

3) Our board design engineer is looking into P1 pin.

Regards,

Dheeraj Kalva

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Anonymous
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Hi,

In regards to item number 3, we have a 10K-ohm pull-up resistor on P1 (pin 25) for the embedded EEPROM WP, this is the implementation recommended in the Technical Reference Manual. I don't think this is the issue with the SPI interface.

Thanks,

Briana

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Anonymous
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Your speed is set to 8000000.  Is that a valid speed?  I thought I read somewhere 6 was the limit. 

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I would tend to agree. The maximum SCLK speed supported by SPIFFY2 is 6 MHz at all IO supply voltages.

The hardware interfaces guide provides an example of a master that operates at just 1M and we know it works: WICED™ Smart Hardware Interfaces