3 Replies Latest reply on Sep 24, 2012 8:43 PM by crcac_264396

    Verilog Modules

      Hello everyone!!


      I'm working on a project for my 582 class and I'm trying to explore the PLD capabilities on the PSoC. I'm trying to create my own modules described in verilog to implement pieces of hardware in my project just to speed the things up. Anyway, my question is how do I implement more than one verilog file to my module?


      So I know that I have to create a new module under Components, and then create the .v file. However, I need to use more modules inside of such .v file, but I haven't find the way to create more .v files and add them to the library.


      What I'm trying to say, is that suppose that I create a new module called MyComponent that I will drag and drop eventually to my TopDesign, then I create the .v file for my MyComponent, how do I create new modules inside of that .v file, or how do I add more .v files to the directory in order to use modules that are described in other files.


      That's something very common in verilog, right? To create a bunch of modules that will do little things and then create a TopModule, so I suppose that there is a way to do it in PSoC Creator 2.1 but I just haven't find it.

        • 1. Re: Verilog Modules

           If I'm not mistaken, PSoC Creator limits you to one verilog file per component, but you can put multiple modules in a single verilog file.  Can someone confirm?

          • 2. Re: Verilog Modules

             You can't, because everytime you regenerate the file, the other modules will be erased. However I figured out that the include line works, as long as you put the whole path, otherwise it will try to look into the system files. Is a solution, but not a great solution because if the files get moved to another computer, the code wont work anymore.

            • 3. Re: Verilog Modules

              well, according to the Warp TRM you should be able to use multiple modules in the one verilog file. I've never tried it though.


              "Note PSoC Creator allows only one Verilog file per component. All modules for a component must
              be included in the same Verilog file. Also, all module names must be unique across the entire