I am working on bit destuffing and i have implemented it in software but i also need a hardware implememntation of that. has anyone worked on such before.. i'm getting shifting in serial data into a SIPO shift register and getting a parallel output. I have done flag detection and nrzi conversion of the raw data and now i need to do the bit destuffing and stuffing on the data.
Sounds like this may be made with Verilog / DataPath. There are a handful of videos to get started, also the PSoC Sensei blog will be a sound well of information regarding hardware configurations. Have a look or two at those.