Yes. We need to monitor the ThreadReady flag while writing data to FX3. This ThreadReady flag indicates whether the buffer allocated to that thread is free to accept data or not (in case of writing).
How these DMA flags are configured in your application?.
I have 4 Fifos. 2 for reading and 2 for writing. There are 4 ThreadReady flags each of them are connected to one fifo.
When I write to the fifos using SLWR# I monitor one of the ThreadReady flags. My logic is simple: If flag is low don't transfer else transfer using fixed burst lengths. As far as I understand since the flag signal has a delay of 3 clocks I must loose data, but this never happens. If the fifo gets full the flag signal gets low 4 clock after SLWR# gets high.
Note: In my previous post I wrote SLRD# instead of SLWR#.