Anonymous
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Oct 09, 2012
09:27 AM
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Oct 09, 2012
09:27 AM
could anyone help me with the verilog implementation of the PArallel in serial out shift register in datapath
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PSoC 5LP
2 Replies
Oct 09, 2012
10:11 AM
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Oct 09, 2012
10:11 AM
I already posted a verilog solution to you in your last thread. Have a look here http://www.cypress.com/?app=forum&rID=69759
Bob
Oct 09, 2012
10:40 PM
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Oct 09, 2012
10:40 PM
Are you looking from something that is specifically using the datapath? Does it need a parallel hardware load?
If so, have a look at the base shifter provided in the component library
BShiftReg_v2_10.v
Hard to find these some time, on my computer it is here:
C:\Program Files (x86)\Cypress\PSoC Creator\2.1\PSoC Creator\psoc\content\CyComponentLibrary\CyComponentLibrary.cylib\BShiftReg_v2_10