Anonymous
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Nov 21, 2012
11:16 PM
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Nov 21, 2012
11:16 PM
hi, can anyone suggest how to interface SRAM with FPGA, should any precaution I have to take, or any pullup resistor i have to connect with data and address pin.
pls reply.
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SYNC
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Nov 22, 2012
12:15 AM
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Nov 22, 2012
12:15 AM
Hi Moiz,
Please refer the following Knowledge Base Article which is on Reference Schematic Design Recommendation for QDR-DDR II/II+/Xtreme Sync SRAMs.
http://www.cypress.com/?id=4&rID=72249
Thanks,
Prit
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Nov 22, 2012
12:15 AM
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Nov 22, 2012
12:15 AM
Hi Moiz,
Please refer the following Knowledge Base Article which is on Reference Schematic Design Recommendation for QDR-DDR II/II+/Xtreme Sync SRAMs.
http://www.cypress.com/?id=4&rID=72249
Thanks,
Prit