In the UART component of PSoC, when the Flow Control parameter is selected as Hardware, then a "cts_n" terminal appears on the input side of the component.
The cts_n input indicates that another device is ready to receive data. This input is an active-low input indicated by the _n, and indicates when the other device has room for more data to be transmitted to it.
Are you probing the CTS line on an oscilloscope? What device are you interfacing PSoC with?
i am using RS232 analylzer software in my pc to see whats happening,
In the following Kits :
There is a problem with Hardware Handshaking in that the CTS/RTS pins are swapped on the development kits.
There are two workarounds to this problem :
1) Don't use hardware handshaking, select software handshaking (3 wire protocol) only.
2) Wire a DB-9 Female to DB-9 Male adaptor plug with the following pinout :
2 -> 2
2 -> 3
7 -> 8
8 -> 7
There is also an issue in PSoC5 with clock frequency drfit at high baud rates.
Enable the External Crystal to act as your Buad rate source.
I found a beta version of a program called MarkerPlot. It allows me to monitor and record data. I am trying to use a three wire connection. The example from Cypress uses 57600 baud.The cypress example is only using transmit? The plot software uses 57000 baud. I keep getting frame problems. Do I still need to change the wiring on the RS232 connector. I am using a PSoC 3 SDK with production silicon.
I think the issue of swapped CTS & RTS lines were there only in -001 DVK. That also has been fixed in the new kits.