7 Replies Latest reply on Jan 28, 2013 5:32 AM by DaKn_263916

    Not just another pretty Waveform Generator

      Sharing this insightful blog post by Mark Hastings on the application note AN69133.




      The WaveDAC8 component and application note (AN69133) was released about a year ago.  I found that many people see the title Easy Waveform Generation with the WaveDAC8 Component and think that it just generates a simple waveform.  The component is far more flexible than that.  The application note AN69133 contains four example projects to show the flexibility and ease of use.  Granted the first project generates a simple sine wave but the other three projects go further. 


      The second project, 2_WaveDAC8_TwoWaves shows how you can alternate between two waveforms and easily switch right at the end of each wave.  The project schematic is rather simple, and the source code can t get much simpler.



      Project source code.






      void main()




       /* Initialize WaveDAC8 */




         for(;;);  /* Loop forever */




      This is the waveform output, notice it is not just a simple sinewave.



      The third project "3_WaveDAC8_UART_FSL" shows how to generate a simple FSK output when you combine the WaveDAC8 and UART components.  Note the simplicity of the schematic below.  By changing the two clocks you can generate any two frequencies you want.



      The scope screen shot below shows the output of the UART and the WaveDAC8 output.



      Again the code can t get much simpler to send out Hello World .




      void main()




         /* Initialize WaveDAC8  */




         UART_1_Start();  /* Initialize UART */


         Clock_1_Start(); /* Start both clocks */








            /* Send "Hello World"  */


            UART_1_PutString((uint8 *)"Hello World");


            CyDelay(250);   /* Wait 500 mSec */








      The forth project was probably the most fun.  Who doesn t enjoy dialing their phone with their own custom made PSoC controlled DTMF dialer.   This project used two WaveDAC8 components, a couple of counters, an opamp to buffer the DAC outputs, and a single clock.



      This project demonstrates another cool feature of PSoC.  Since the WaveDAC8 component uses standard internal DACs to generate the output,  connecting the two DAC outputs together is not a problem.  When the DAC is in the voltage DAC mode, it is simply a current DAC with an internal resistor.  Now the coolest thing about this project is that it gives you a good chance to use that FFT feature in your digital scope.  I had the DTMF dialer project dial the sequence 159D which causes all of the eight tones to be exercised.  Using the Tek MSO 2024 FFT mode I can see the frequency spectrum of the output, cool eh?





      You can find the full application note, example projects, and WaveDAC8 component library on the AN69133 Application Note web page. The application note contains details about the design of the WaveDAC8 and information on sampling theory.




      So just remember, although the WaveDAC8 maybe pretty, it has some brains as well.  Since it does all it's work with DMA, it does not require any of the valuable PSoC 3 or PSoC 5 CPU cycles.

        • 1. Re: Not just another pretty Waveform Generator

          This looks awesome!

          • 2. Re: Not just another pretty Waveform Generator

            Would love to see added to this component ability to burst N cycles


            of a waveform, and do M burts with a delay D in between them.


            Also algorithims to fill waveform table of depth Z with all the common


            waveforms, sine, cosine, sinc, sinc(x)/x, fullwave, halfwave, tri, ramp,


            exponential (both types), pattern....




            Burst control logic input.




            Regards, Dana.

            • 3. Re: Not just another pretty Waveform Generator

               A very nice component; one feature which would be really nice would be for the IDAC to be able to source and sink. A method is shown on this page: sites.google.com/site/impedancetester/projectsummary. This will allow the IDAC to operate within it's voltage compliance, and allow easy offset of voltage.


              Fingers crossed that this can be implemented.



              • 4. Re: Not just another pretty Waveform Generator

                Hi JonFuge,




                The good news is that IDAC can now be configured as either Source or Sink in Hardware.


                While configuring the IDAC component, if the Polarity is chosen as "Hardware Controlled", then an "ipolarity" terminal will appear on the component. When this terminal is held High the IDAC will Sink current, when held Low it'll Source current.




                The config window is shown below:

                • 5. Re: Not just another pretty Waveform Generator

                  The feature of hardware controlled polarity can be used to change the direction of the current without any CPU intervention.




                  • 6. Re: Not just another pretty Waveform Generator

                    Some precautions on using this approach -




                    ipolarity – Input*
                    The ipolarity input is an optional signal input pin. This pin can be controlled by Digital
                    components or control register. This is used to control the direction of the current, either source
                    or sink to its load. When this pin is connected to logic ë0í (source), the output of the DAC sources
                    current to a load that is connected to VSS or other voltage that is at least 1.0 V below VDDA.  If the
                    pin is connected to logic ë1í (sink), it supplies current to a load that is connected to VDD or other
                    voltage at least 1.0 V above VSS.




                    Note When using the ipolarity input to change the IDAC8 polarity, either the Source or Sink
                    mode will no longer be calibrated and could have errors in excess of 25%. 




                    Regards, Dana.

                    • 7. Re: Not just another pretty Waveform Generator

                      The prior post, first consideration is just headroom to keep I source in compliance.


                      Its the second consideration that is more concerning, in a wavedac application. Some


                      possibilities -




                      1) Place two IDACs, one source, one sink, and mux with external low RDSon MOSFETS.


                      Additionally plan on a cal routine to take out +/- 5% error that each IDAC is speced at.




                      2) Use 2 OpAmps, and external bipolar NPN, PNP, to construct a source and a sink.


                      Drive with VDAC. Cal routine per above and switch with external FETs. This is a little


                      better than 1) in terms of accuracy since 1 VDAC is primary error contributing device,


                      eg. you are not challenged with matching two I generators.




                      Either of these approaches challenged due to temp drift, worst case design. And the


                      switchover transients from source to sink to source.




                      Regards, Dana.

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