When you upload here your project so that we all might have a look at we could probably give you some advice. Please use the "Create Workspace Bundle" (minimal) function of Creator 2.2.
PS Good afternoon? My watch shows 22:05, it is pitch dark outside.
The interrupt latency in Cortex M3 is 12 cycles, take a look at this -
Additionally the ISR latency is a function of what you do in it. Hopefully
you are not calling any API's from within it, which results in stack push,
and of course the latency due to the API code. Normally what you want
optimally is to set a flag in ISR and return, and then process in main.
It is incorrect to assume ISRs are not sensitive to rate, they get
latched by HW but other processes and ISR activity may rob MIPS from
CPU to service. I assume your priority is highest level for this ISR.
Lastly at 1 Mhz you need to count cycles in code to see what your latency
is. If it is too great then resort to HW to handle the sampling of the data I
assume you are doing. Verilog of course very useful here.
Good afternoon, I am Colombian, I dont have good English, I hope you understand
I will comment that my project is to know how I can help.
I have two rotary encoder, they send the absolute position by a frame of serial data by a Manchester code, the encoders are of 11 bits.
To get the position, I decode the signal. The Manchester decoder is not the problem, the problem is the timing, and for that I get a interrup for rising edge and falling edge to synchronize the decoder.
The delivery code encoder is shown in Figure
I must get the data (15 bits) of the first frame.
I do not know what idea you have to be able to help.
Attached two codes
One simulates the clock and then with a interrup on and off an output pin.
The other has a signal input to the decoder.
manchester.png 35.6 K