By the way ,the board CLK is 26MHz .It is 19.2MHz with previous and it is work well。
What are the differences between old and new boards?
Could you please double check your power domain connections and decoupling capacitors?
Thanks for your replay.
I am a software engineer, My hardware Engineer tell me that the differences are the CLK(previous 19.2MHz now 26MHz) and High voltage(previous 1.8v now 3.3v). when 3.0port connected the device attach - detach - attach -detch........ .But 2.0port connected it is stable.
When the CLK change to 26MHz ,does the formware need to do something ?(e.g:the CPU clk Frequency-divisional) If it is need please tell me .thanks !
By the way what the mean of "domain connections" and how to check.
Are you sure the 3.0 descriptors are correct, please check once using uvc view, this happened to me before , but i think i had given wrong length values in the descriptors.
Thanks for your infoemation .I have test with the uvc example ,and it is really stable with usb 3.0 port .
But the uvc is a apecific device.the base class is 0xFE ,I want to use 0xFF (as a Vendor specific device ).
I checked my descriptor ,and is correct. Why it is stable as a uvc device.and others are unstable? Can you eaplain for me Thanks!