4 Replies Latest reply on Mar 16, 2013 4:23 AM by jon.bean

    DMA help

    jon.bean

       I am using trying to get the slave fifo design from the app note working. I am using my own verilog code in the FPGA. I have managed to get the read from the slave to work and I can transfer 512 bytes into the FPGA. With the write I have flag a as the DMA ready for thread 0. I write 512 bytes into the buffer but the flag never changes. I have also tried it as the current thread ready and the A1:0 pins set low, but still nothing. Anyone have any ideas what could be the problem.

         

       

         

      Thanks

         

       

         

      Jon 

        • 1. Re: DMA help
          jon.bean

          Actually I was mistaken. If I have flag a set to the current thread ready, and the Address = 0 then the flag is 0 (buffer full). This is even though I havent written anything in to the buffer.

          • 2. Re: DMA help
            jon.bean

             Just had a look in the GPIF II designer. Getting the following messages. Not sure if this is the problem but I would like to know what it means anyway. Thanks.

               

             

               

             

               

            Info: atl.M00066: This project will be built using mirror states and state machine will be modified internally. Do you want to build?

               

             YES

               

             

               

            ADD: atl.M00069: warning: Input signal/s 'SLWR,PKEND' is/are used for the identifying the mirror states and corresponding terms have been removed from outgoing transitions from the state 'IDLE'.

               

             * State Machine ()

               

             

               

             

               

            ADD: atl.M00069: warning: Input signal/s 'SLWR,PKEND' is/are used for the identifying the mirror states and corresponding terms have been removed from outgoing transitions from the state 'DSS_STATE'.

               

             * State Machine ()

               
                    
            • 3. Re: DMA help
              rama.sai.krishna.vakkantula

              Hi Jon,

                 

               

                 

              The GPIF II hardware imposes some limitations on the state machines that can be implemented. Mainly, these limitations are:

                 

              ·         Full support is limited to state machines that are limited to two (or fewer) outgoing transitions from each state. Such state machines are called binary state machine in the rest of this document.

                 

              ·         Each transition equation is limited to the use of four (or fewer) trigger variables.

                 

              If you look at the Slave FIFO state machine, it has few states where outgoing transitions are more than two. Then GPIF II designer automatically uses mirror states. But there are few constraints on transition equation if we are using mirror states. If our design does not meet those specifications then GPIF designer complains that it cannot build the project.

                 

              The constraints on transition equations are:

                 

              ·         The transitions can be split into groups of two each, such that each group applies to a specific combination of trigger values.

                 

              ·         The transitions in each group should have the same transition equations after the global trigger terms have been removed.

                 

              ·         The target states that share the same transition equation should not use conflicting actions.

                 

              Input signals SLWR and PKEND are needed for building your state machine using mirror states to satisfy the constraints on transition equations. I think you might have removed them from the transition equations. That is the reason why that tool is asking you to add those two to transition equations to meet  constraints on transition equations.

                 

               

                 

              For more details, please refer mirror states section in GPIFII designer user guide.

                 

               

                 

              Thanks,

                 

              Sai Krishna.

              • 4. Re: DMA help
                jon.bean

                 I managed to get it working. There was a problem with the slwr signal on my pcb.

                   

                Thanks

                   

                Jon