3 Replies Latest reply on Mar 27, 2013 7:24 AM by GayathriV_16

    How does CY7C68001 and its external master get to realize that there is an IN request from a host PC?

              Hello all: When I read the datasheet of CY7C68001, I find that there are SETUP and FLAG interrupts to notify the external master a control transaction vis EP0 and an OUT transaction vis EP68 respectively. But there is no such interrupt signal for an IN transaction. For example, on the cypress USB console, if I select EP6 and enter non data byte, after i click the transfer button, how could the USB chip get to know the request and response accordingly?