3 Replies Latest reply on Mar 30, 2013 9:11 AM by user_74237027

    GPIF design with master mode to implement 8080 interface

    user_74237027

      Hi,

         

       

         

      I'm design a bridge to read/write 8080 type device through USB. But I have problem on the GPIF2 waveform design. For write operation, I can use DMA_RDY_CT to trigger write operation. But how to trigger read operation?

         

      A sample project that uses GPIF2 as master to interface with a SRAM type device would be much appreciated.

         

       

         

      Thanks!

         

      Rover