1 Reply Latest reply on Apr 1, 2013 12:40 AM by prit

    K/K# being single ended but 180 degrees out of phase

    travis.ayres

       This EETimes article www.eetimes.com/design/memory-design/4395832/Interfacing-QDR-II--Synchronous-SRAM-with-high-speed-FPGAs--part-1 by Reshi Ravindranand and Ajay Bharadwaj says K and K# are not differential signals, but are single ended signals that are 180 degrees out of phase. 

         

      I thought those were differential signals?

         

      Thanks,

         

      -Travis

        • 1. Re: K/K# being single ended but 180 degrees out of phase
          prit

          Hi Travis,

             


             

          Please note that K and K\ clocks are not true differential clock signals. There is no differential receiver in the SRAM. The QDR uses the rising edges of K and K\ to latch input signals. Both clocks are single ended signals. Although they are not true differential, it is advised to keep K and K\ 180 degrees out of phase with respect to one another. This effect produces the ability for the QDR to perform a double data rate with one clock cycle.

             


             

          Thanks,

             

          Prit