This question is further to my question a Why does EZI2C need a 60MHz clock? But the mystery has deepened, and new evidence points to something strange happening in PSoC Creator.
I'm using the EZI2C device to emulate an I2C EEPROM. It is being read by an external device. I wired it up as you'd expect, using the special I2C0:SCL and I2C0:SDA pins. Data rate 300kbps, 1 address, Primary slave address 0x50, Sub address size 8, Pin connections Any. The PSoC's Master clock is set to 40MHz. The project is empty except for the EZI2C component and its pins. The main() function does nothing (just an empty loop) after setting up the EZI2C component.
At this point, everything is working correctly. The external device can read values as if there was a real EEPROM there.
Next, without changing any code, or any other setting within the project, I delete the file SF_01.cywrk.Sandy Lunch which appears in my project directory. PSoC Creator almost instantly re-creates it, but it's not identical to the original. Then I press Shift-F6 to build the project. The output says:
--------------- Build Started: 04/18/2013 17:50:43 Project: RNX-PCB-ST-GIO_00, Configuration: DP8051 Keil 9.03 Debug ---------------
The code generation step is up to date.
The compile step is up to date, no work needs to be done.
The link step is up to date, no work needs to be done.
--------------- Build Succeeded: 04/18/2013 17:50:44 ---------------
Looks like that workspace file isn't required by the build process right? -- Wrong!
Next I do a clean and build, and re-program the PSoC with the new code. Now it doesn't work properly. The external device only sees nonsense values coming back from the PSoC. Then, if I increase the master clock to 60MHz and re-build and re-program, the EZI2C seems to work again.
What's going on here? Why is there a generated file which affects the build process like this? If it affects the build process, then why doesn't the build process know that? What on earth is contained in this file that is affecting my project in this way?