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    Use of logical gates



      I am trying to implement a combinational logic using agtes such that the output goes high on high output from Comp_1(High level comparator) and remains high till the signal from Comp_2( Low level Comparator) goes low. Can any one help me out on this issue as with the setup (attached) the output is high when the Comp_1 output is high but the output switches to low as soon as the comp_1 goes low.

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