Thsi seems to affect other components as well. For example, as discussed in this thread, the control register on PSoC5 cannot use pulse mode. Yet this isn't disabled in the configuration dialog, nor is it mentioned anywhere else (in fact, even the TRM explains this mode...)
True! And there are alot of discrepancies in the datasheets once you start delving into more complex sections. Some parts mention compatibility, others forget to say what PSoC chips it is applicable for, others give workaround that don't work due to the provided workaround not applicable on the target either.
Just had a look at it again (and tested with PSoC5). The 'one-shot' run seem to work there. And the 'one-shot with halt on interrupt' mode is stated in the timer data sheet as being only for the UDB implementation. But the UI still should disable this option (as it does with other ones) when selecting the FF implementation.
As for my example with the control register - I suspect its a bug in the validation during the CyFit process, since all other places agree that it should work...