3 Replies Latest reply on May 21, 2013 5:06 AM by user_14586677

    Effective Speed Difference

    sampath.kumar

      It is stated in the datasheet that "The flash block is designed to deliver 1 wait-state (WS) access time at 48 MHz and with 0 WS access time at 24 MHz". So, what is really the MIPS difference between 24MHz and 48MHz?