3 Replies Latest reply on Jun 16, 2013 6:10 AM by ki.leung

    Use of P1 for both debugging/programming and GPIO

    user_185194099

      In our current research project I need to use the debug pins on P1 temporarily for another purpose under

         

      program control.

         

       

         

      So I want to be able to disconnect the pins from the JTAG/SWD and connect them to some other circuitry under software control.

         

      However, PSoC creator does not let me do it unless I have switched to "GPIO" in the debug section (Programming\Debugging->Debug Select)  in the system tab.

         

      I have searched through the TRM and only found the hint in Section 39.5 of the PSoC 3 TRM:

         

      "Two NV latch bits determine the state of the JTAG/SWD interface pins at reset" 

         

      But it does not say whether this can be changed later.

         

      I want the pins active as debug on startup, but I want to wire them to internal circuitry.

         

      Since the acquisition of the test controller is such a protected activity I am sure that my external circuits will not

         

      interfere with the debugging function until my application software runs and can control the enable/disable of the debugging functionality.

         

       

         

      I am not sure whether this is problem of PSoC Creator or the architecture that's why I ask here.

         

       

         

      Andreas