Hi neha, Where is description "specifies it as gnd +/- 0.5V" you said? 0.5V is too big. And "much below gnd", How much the voltage and your gain setting? As usually you can use internal Vref or a Vref module outside of PGA. I mean "OpAmp" voltage follower at Pin-3. might be doesn't need. Need more detailed informations.
1. What is the voltage you are giving in P0 pin?
2. Where is it specified that Vssa can be GND+/- 0.5V?
3. It is definitely not possible to get -ve voltage out of PSoC as the lowest potential for the device is 0V only. How much low are you seeing at the output?
4. Why don't you specify the voltage values you are seeing on different pins of your project?
If you have an ohmic path from Vssa to the point at which you observe the OpAmp
output refered to that ground point then you will see swings below ground. That
usually would be caused by poor layout, high current in Vssa ground path, poor
contact. The Vssa spec, as with virtually any CMOS pin, is controlled by worst
case threshold voltage of parasitic diodes attached to pins on all virtuall all CMOS
The reference spec is as follows -
GND+/- 0.5 was a mistake, Pls rectify..its Vssd instead!
input is fixed frequency 5K triangular pulse which 280mV Vp-p( 140mv above and 140mV below gnd nearly). Gain settings can be seen in the main .c code which is attached with the project. an 8 bit variable can set PGA gain values among unity, 2, 8, 16 and 24 through USBUART. I've observed that-
> at unity gain 100mV above gnd with retained peak and 40mv below gnd with peak clipped off
>at 2 times gain 200mV above gnd with retained peak and 80mV below gnd with peak clipped.
> at 24 times gain 2.5V above gnd and 1V below gnd peak clipped
and for the opamp( opamp_3) in the schematic was used just to test the maximum swing in the output from Vdda to Vssa. Same pulses as mentioned in OP were fed to PIN1_6 of the opamp which is non inverting terminal while the inverting is external gnd.
the output is Vp-p 4.8V square wave with 2.4V above 2.4V well below gnd.
Don't think you should have signal below 0V. We normally have a "virtual" ground which is 1/2 Vcc for analog signals.
The OpAmp intrinsically cannot swing below its output Vssa rail, otherwise
it is a free energy generaor we should all be using. However input can common
mode below Vssa, but not much.
So if you have a signal, fed o Vssa, that swings blow ground, and you do not want it
clipped/distorted then you have to meet both CMR on input and output. You do this
by offsetting input so that it meets both input CMR and G x Vin output CMR.
Two resistors can accomplish this, see attached calculator spreadsheet and article.
121238.xls 12.0 K
Thnx dana, thnx evryone... gr8 help.. :)