SPI not waiting for completion

[HuEl_264296]

Hi,

   

I am using the SPI slave module on a CY8C24423A. This has been working fine for several years, but now I seem to have changed something in the SPI master, because NONE of the PSoC SPI slaves are responding to it.

   

After the chip select is detected, the PSoC loads a byte into the SPI buffer, then waits for the SPI transaction to complete:

   

    mov    A, 0x06               ; MSB First SPI mode 3       
    Call    SPIS_1_Start

    Mov    A, %10101010    ; Load a byte into the SPI
    Call    SPIS_1_SetupTxData

   

SPI_Wait:                          ; Now wait for the SPI transaction to complete
    Call    SPIS_1_bReadStatus       
    AND   A, 0x20                ;0x20 = 'SPI Done' status mask   
    jz        SPI_Wait
   

   

However, the SPI_Wait loop exits immediately, even though there no clock edges have appeared yet. I have verified this on a 'scope.

   

Any ideas why the loop might exit immediately?

   

Many thanks

   

Hugo Elias

[Anonymous]

Not the same thing as yours but I am having problems with the newer version 2_1 of SPI master. I think the newer version has some things wrong. I am using PSoC development board and using the SPI master and SPI slave just for a test without even connecting the wires externally. Everytime I write to the slave the SPI master shows the SPIM_RxBufferSize() to be 1 when there has nothing been sent back by the slave.  Is there anything else I need to set up. 

[pushekm_21]

 Hi Hugo,.

       

SPI Status register gets cleared whenever you read them else they retain their value. Can you please confirm that before this transaction or loop the status register has been read once to ensure that this does not have the status of previous transaction.

       

Cheers,

   

Pushek

[pushekm_21]

Ananta,

   

Irrespective of the point that wires are connected or not, when master will transmit something will be received in the Rx buffer. When wires are connected data has been properly set up, the received data will be valid else it can be any random data. You need to ensure a couple of things to debug the problem:

   

1. Whether data received is valid or not.

   

2. When exactly does the master initiate the read by sending the SCLK pulses. Does it have anything to do with you setting up the data in slave?

           

Cheers,

   

Pushek

[Anonymous]

I started a project with the PSoC 1. The project became larger than planned. I cannot upgrade to the PSoC 3. Can you suggest a book with examples of SPI communications? I am trying to communicate with a TI ADS1211. It is a 24 bit ADC with SPI interface.

   

I have now become a bit confused. I have seen code for PIC, Adruino and Atmel. But they have there own include libraries.

   

I am running out of time to deliver my project to production.

[pushekm_21]

 Please let me know your email address, I can send you some example projects else please let us know what is the problem you are facing with SPI.

       

Best regards,
Pushek

[Anonymous]

Well here it is 2013 and I am revisiting SPI . I am trying to develop code for 24bit ADC IC. It is using 4 wire SPI bus. If you are still around?

       

email: pnielsen@gplains.com

[Bob_Marlowe]

Since 2011 there have been significant changes. To mention is the capability to get a choice of (working) example projects just by a right click on the SPI component.

       

Bob

[ETRO_SSN583]

Or on start page using "Launch Example Browser" middle pane left.

       

Regards, Dana.