2 Replies Latest reply on Mar 15, 2018 6:09 AM by veRN_2322216

    slavefifo steamin example of FX3, receive failure when data in rate slow down , why?

       The code I used is from AN65974 - Source files for FPGA code and FX3 firmware;


      when I use both FPGA and firmware from the above AN65974, the streamin example work well; PC side streamer.exe also works well; transfer speed is about 380Mbyte/s;

      then I change the FPGA code slightly, the PCLK frequency from 100M to 60M , in the PC side, sometimes receive failure happened;

      if PCLK is to 40M, in the PC side, more receive failure happen;

      Suppose the input data rate is slow down, maybe more time is needed, so I change the PC code : InEndpt->WaitForXfer(&inOvLap,20000); from 2000 to 20000, but the same problem exist;

      in 68013A, however, when the input rate is slow down, it works OK

      Why this happened, what is the root cause of this problem, and how to make the change so that 3014 works well not only in high speed datain rate but also low speed datain rate?