This is just an idea, I do not ever. Would you use the internal logic INV for the oscillator. This is a feasible idea. I think.
If you have to use internal oscilator and needs low power, then try the PSoC5 LP.
There are Watchdog chips with watch crstal oscillator which is reasonably low power. You may be able to use the clock signal to trim the internal oscillator.
Some thoughts -
1) Use of a onchip gate for OSC element, like shown in Fairchild Ap Note, is
a compromise. First on chip oscillators, device size used, big impact on power.
Second there is no temp compensation in a plain vanilla CMOS gate. Third
device to device variations impact osc loop, so startup, reliability are all potential
2) There is a technique, at manufacturing test, to input, to a pin then counter chain
to measure F, a high precision clock of known F. A measurement is made and that
determines a G correction for all future measurements. That of course does not
comp for T and V. To do T, a technique used in industry, is to force large currents thru forward
biased pin diode, to heat up a part, then swicth to normal mode operation, and take several
readings over temp to establish a least squares error curve fit or power equation coef-
ficients. V of course is a precision programmable power supply, and it is swept thru a range,
and offsets to precision F are recorded and used in future reading interprolation.
I think your calibration approach is good. However, it would be very time consuming during production.
One way to do it is use a external low power oscialltor to generate a 1 hz signal and internally use a counter with the master clock as the input with the 1 HZ as the gate, every second check the deviation of the count and adjust the internal calibation value as needed.
One trades off cost-external components-accuracy-time-precision-architecture-reliability
in a design. The approach I show is used extensively in precision test instrumentation,
used on our workbench instrumentation..
That approach can take out the T & V dependance of your external oscillator.
One approach recently, for high accuracy, low cost, use of GPS chips to develop
gate. Immune to T and V, but take external components, hence cost and reliability.
Buit then we are just speculating, as we do not know what poster needs in performance
Thanks every one for giving various ideas.
More details about our intended project:
1) We will not be that keen on low power, as we are now allowed to put hefty battery of up to 800mAH, still a low current consumption will be appreciated.
2) We will be generating digital waveform pattern with frequency ranging from 30Hz to 35KHz. Absolute timing accuracy wished will be +-0.008% to +-0.01%. Say e.g. 1 HZ or better at 10000 HZ .
(operating product temperature between 15 C to 48 C)
3) This will be moderate volume product, so, ease of calibration and time to calibrate should be reasonable.
I will appreciate more insight from community in using PSoC4 to achieve the end result.
Hi electro, Accuracy you said is +-80ppm to +-100ppm. That is feasible by a simple cristal element. For calibration is need trim-capacitor. When carefully designed will be accomplish the products.
For this accuracy, the best may be using crystal oscillator. But if cost is an issue, may be a crystal with a low power cmos gate/inverter IC would do the job. Or you can try one of the new MEMS oscillators as well.
Thanks for the suggestion, As we are planning a master main clock frequency of 48MHz, Our external oscillator clock frequency has to be 48MHz, as there is no clock PLL multiplier in to PSoC4. Is this correct or we can try something else? Regards, Vinay
48 Mhz is the external spec for PSOC 4, that would be the way to
achive what you are looking for.
Would you consider PSoC3 in this case?
For most micros the external crystal has capacitors on two pins and two connections to the uP. The PSoC4 only has P0_6 as a connection so I am curious of how to use an external crystal with the PSOC4. Please give a reference design if possible...thanks.