2 Replies Latest reply on Oct 11, 2013 12:27 PM by userc_43015

    GPIF as Master. Address Lines 15:12 GPIO 49:46

              I am trying to use the GPIF as 16 bit address/16 bit data bus non multiplexed. GPIF designer is enclosed. GPIF is initialized using the following code. io_cfg.isDQ32Bit = CyTrue; io_cfg.useUart = const_flag_enable_UART_disable_SPI; // Shay io_cfg.useI2C = CyTrue; io_cfg.useI2S = CyTrue; io_cfg.useSpi = CyFalse; // We do not use SPI for the time being. We use firmware generated pin switch io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT; io_cfg.s0Mode = CY_U3P_SPORT_INACTIVE; io_cfg.s1Mode = CY_U3P_SPORT_INACTIVE; // Table of enabled GPIOs io_cfg.gpioSimpleEn[0] = 0; io_cfg.gpioSimpleEn[1] = 0; io_cfg.gpioComplexEn[0] = 0; io_cfg.gpioComplexEn[1] = 0; status = CyU3PDeviceConfigureIOMatrix (&io_cfg);// IO matrix is not recommended to be dynamically changed. I am trying to set address bus using CY_U3P_PIB_GPIF_EGRESS_ADDRESS(0)=Address; The lower address lines 11:0 works well. The address line 15:12 always generate zero. Any idea what is the cause of the problem ?   
        • 1. Re: GPIF as Master. Address Lines 15:12 GPIO 49:46

           Hi Gal,     



          I see few differences in the configurations that you are using on the GPIF II designer and in the iomatrix configuration.     



          You are using only the 16-bit data but you are assigning CyTrue to io_cfg.isDQ32Bit. Please change  this to CyFalse.     



          Also, it looks like you are using UART, but you did not select that in the GPIF II designer tool.     



          Just to isolate the problem, assign CyFalse to  io_cfg.useUart as well.     



          Please let me know the behaviour after doing these two changes.     






          Sai Krishna.     


          • 2. Re: GPIF as Master. Address Lines 15:12 GPIO 49:46
                    Thanks Sai for your suggestions. Nevertheless, even after setting DQ32Bit to CyFalse and toggling the UART flag, nothing was changed. Address lines 15:12 are always zero. I enclosed the entire memory access routine.