1 2 Previous Next 15 Replies Latest reply on Oct 16, 2013 9:06 AM by user_14586677

    Supply VDDIO with bufferd VDAC output

    kohei.miyazono
              Hi. I'm designing circuit using CY8C3446LTI-083 which has only 5V supply and have to interface 3.3V system (I need vddio0 to be 3.3V). I thought It can be done without regulator by following way. 1. Supply VDDA, and VDDD with 5V. 2. Set VDAC8 to generate 3.3V, use OpAmp0 as output buffer. 3. connect OpAmp0 output(P0[1]) and vddio0 externally. Is my thought correct? or other ideas? Thanks in advance   
        • 1. Re: Supply VDDIO with bufferd VDAC output
          user_14586677

          The OpAmp is rated worst case for a total of 16 mA output source. So

             

          Vddio loads would have to be pretty light. Additionally the OpAmp is a

             

          slow device with regards to transients on its control loop, which Vout

             

          is  a part of, so you may get a lot of transients on GPIO pins. And you

             

          cannot bypass Vddio with C as it would probably put the OpAmp into

             

          oscillation as it is not comped for high Cload.

             

           

             

          Regards, Dana.

          • 2. Re: Supply VDDIO with bufferd VDAC output
            user_14586677

            One solution would be to use a 1.8 volt zener like http://www.diodes.com/datasheets/ds30410.pdf

               

             

               

            Or 2 Si diodes = nominal Vddio 3.4V, all depends on I/O loads and what you

               

            are driving. Clearly nosie margin is of concern, and meeting I/O load specs.

               

             

               

            You would have to worst case the design.

               

             

               

            Regards, Dana.

            • 3. Re: Supply VDDIO with bufferd VDAC output
              user_78878863

              Is the 3.3V circuit you are using already powered with 3.3V?

                 

              I'm not sure whether its allowed at all to power the PSoCs VddIO line from within itself. You would need to be careful thatthe VddIO you are powering has no dependency to the part providing this power...

              • 4. Re: Supply VDDIO with bufferd VDAC output
                user_14586677

                Just to be clear the recomendations I gave are assuming, as stated in

                   

                original post, that you are using an external 5 V supply, so my comments

                   

                about use of a zener or two Si diodes are to obtain power from that 5 V

                   

                external supply fed to the zener or diodes acting as semi regulated Vdrop

                   

                to derive the ~ 3.3V.

                   

                 

                   

                Again, I recommend you do NOT use OpAmp for the following reasons -

                   

                 

                   

                1) Transients on Vddio causing OpAmp to fall out of regulation.

                   

                2) External CMOS input loads drawing power because OpAmp excessive recovery

                   

                time to a transient leaving external CMOS loads (inputs) that will cause N & P transistors

                   

                in the inputs to both conduct for some period of time = large system currents..

                   

                3) You cannot bypass Vddio because OpAmp not comped for large Cload.

                   

                4) Degraded noise margin as OpAmp output is not R-R.

                   

                 

                   

                The optimal best simple approach, use a LDO off the 5 V supply. One that can handle

                   

                large Cload. Better yet, a switcher for better efficiency.

                   

                 

                   

                Regards, Dana.

                • 5. Re: Supply VDDIO with bufferd VDAC output
                  kohei.miyazono
                          Thanks for your advice Dana. I need 3.3V only for logic reference, not to power the external circuit. I'll use the zener as you mentioned.   
                  • 6. Re: Supply VDDIO with bufferd VDAC output
                    user_78878863

                    If your external circuit has already a 3.3V power supply, you can use this one to power to VddIO you need for interfacing to it.

                       

                    Or yu can use SIO pins for the interface. Then you can set their output level to 'Vref', and power the reference by the DAC internally.

                    • 7. Re: Supply VDDIO with bufferd VDAC output
                      user_14586677

                      Not so sure you want to do that based on drive levels from SIO -

                         

                       

                         

                       

                      • 8. Re: Supply VDDIO with bufferd VDAC output
                        user_78878863

                        Why? Its about driving logic inputs, so I expect some microamps flowing there...

                        • 9. Re: Supply VDDIO with bufferd VDAC output
                          kohei.miyazono
                                  Thanks for response, hli. In my application, external circuit means RC receiver which output 8ch 3.3V PWM signal. The receiver also has 5V supply and probably has a regulator inside. But I don't want to draw Vddio from internal circuit of the receiver. I know SIO pins can use custom logic level but I need more pins than available as SIO. Now I understood that using OpAmp can make the supply unstable, adding 1.8V zener to form a shunt regulator seems best for me. Thanks. kohei   
                          • 10. Re: Supply VDDIO with bufferd VDAC output
                            user_14586677

                            "Why? Its about driving logic inputs, so I expect some microamps flowing there..."

                               

                             

                               

                             

                               

                            I was not aware of what the loads were, so thinking a mix of logic, LED,.....

                               

                             

                               

                             

                               

                            And of course you are still trying to supply loads via an OpAmp output, comped for

                               

                            unity gain I might add, amongst other issues, which is not going to handle transients

                               

                            well. Really not a good solution.

                               

                             

                               

                            Below representative example of what 1 Mhz switching might look like....

                               

                             

                               

                             

                               

                            Dana.

                               

                             

                               

                             

                            • 11. Re: Supply VDDIO with bufferd VDAC output
                              user_78878863

                              Just a second: so we aren't talking about outputs which should drive 3.3V logic? YOu have an external 5V circuit which, somehow, produces just 3.3V output signals?

                                 

                              That should be no problem, the signal level for 3.3V signals can, in most cases, be properly handled by 5V inputs. You need to check the data sheets of your RC receiver what the lowest guaranteed voltage level for 'high' is - if its above what the PSoC needs to read it as high, you are fine. Then there is no need to drive Vddio with a different voltage.

                              • 12. Re: Supply VDDIO with bufferd VDAC output
                                user_14586677

                                The original post -

                                   

                                 

                                   

                                "Hi. I'm designing circuit using CY8C3446LTI-083 which has only 5V supply and have to interface 3.3V system (I need vddio0 to be 3.3V)."

                                   

                                 

                                   

                                Not sure I understand your point.

                                   

                                 

                                   

                                Regards, Dana.

                                • 13. Re: Supply VDDIO with bufferd VDAC output
                                  kohei.miyazono
                                          hli   
                                     
                                  Now I found that input threshold can be set to LVTTL for gpio pins. I thought only CMOS is available but it was wrong. This makes the threshold 2V so I think I can go with single 5V.   
                                     
                                  Thanks for help you all   
                                  Regards, kmiya0118   
                                  • 14. Re: Supply VDDIO with bufferd VDAC output
                                    user_78878863

                                    @dana: the original statement "needing Vddio=3.3V" implied to me (and to you as well, judging by the first answers) that we are talking about driving a significant load. Thats why the hesitation about OpAmps, and the recommendation about SIO pins came up.

                                       

                                    But when its only about having inputs which need to handle 3.3V-level-logic, then its a completely different picture. And as kmiya found out, its much simpler to solve...

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