CY62148EV30 is a Single Chip Enable device.
Ball A3 ( connected to Battery Backup ) is an NC for CY62148EV30 part.
To Put the device in Stand by mode (Power down mode), the CE# pin has to be de-asserted.
Once CE# pin is High, Vcc (Battery voltage which will eventually power V_Backup) for SRAM can go down as low as VCCDR ( 1.5V) and SRAM will be in Power down mode.
To bring back SRAM in Active mode, Vcc has to come back to Operating Voltage and then CE# can be asserted.
To maintaining Pin Compatibility, you can connect Ball A3 ( NC internally) To V_Backup
Applications Engineer Staff,
Async SRAM, Memory Products Division
thanks for your reply i am using CY62148EV30LL part.
while putting in Power down mode i put CE1 (PIN G3) High and CE2 (PIN A3) to v_backup .
I hope in this i will put SRAM in power down mode .
Just to restate, CY62148EV30LL is a single Chip enable part..so A3 ball is not connected to chip.
G3 ball ( CE#) has to be pulled high as you rightly said to put chip in power down mode