4 Replies Latest reply on Dec 18, 2013 3:38 AM by helic_263931

    Proper DMA Operation

      I am attempting to transfer data from an ADC, to a filter bank, and then to SRAM usign DMAs. I started the project by using the filter bank example project. Data does move through each perepherial however the results being written to memory are incorrect.


      Please assist me in correcting the DMA configuration (or other flaws) that are causing the weird behavior. The program is setup right now so a break point hits after the data buffer fills off the filter.


      Attached is the project.



        • 1. Re: Proper DMA Operation

          Without looking the full API up (so I might be wrong): it looks that the first DMA is triggered only once (transferlength is 1, and the TD doesn't link to itself I think).


          In contrast, the second DMA will, after the transfer count is reached, start again and write to the same buffer from the beginning.

          • 2. Re: Proper DMA Operation

            The DMA parameters are fairly complex so which ones should i fool with?

            • 3. Re: Proper DMA Operation

              I should say that it is difficult to deduce from Cypress's documentation how to configure the DMA's to properly transfer information from the ADC, to the filter, then to RAM in this circumstance. The DMA wizard is supposed to help but seemingly complicates things more. I am very confused on how to set this up (missing a bunch of puzzle pieces).

              • 4. Re: Proper DMA Operation

                There are several places to look into:

                • the documentation for the DMA component
                • some AppNotes: AN52705 (how does DMA work), AN6112 (how to get data aut of a ADC with DMA), AN84810 (advanced DMA)
                • the technical reference manual (TRM) for the technical details
                • some posts on the PSoC Sensei blog

                I guess the example EP58353 might also help - it shows how to get data in and out of the filter block.


                You need to look, mostly, into the CyDmaTdSetConfiguration API call, maybe also at the DmaInitialize calls (e.g. your second DMA moves 4 bytes per request out of the filter, whereas the fuirst DMA puts single bytes into the filter...)