5 Replies Latest reply on Jan 15, 2014 12:26 PM by JoMe_264151

    Two PSOC1 chips in synchronization..



      I want to use two PSOC1 chips which will operate at same frequency and their clocks near to perfect phase aligned.


      Can you please suggest feasible options to achieve this?





        • 1. Re: Two PSOC1 chips in synchronization..

          Set one chip to have a clock output at 12 MHz on a pin. Route this signal to P1.4 on the other device, select external clock source in PSoC Designer.


          ---- Dennis

          • 2. Re: Two PSOC1 chips in synchronization..

            Can it be that you want to execute the same program simultanously on two different chips? If so, you'll need a synchronization feature between them, since they may not startup perfectly parallel, there are some uncalculatable delays.


            If you tell us a bit more about what you want to accomplish we might help you better.





            • 3. Re: Two PSOC1 chips in synchronization..

              If you wanted a truly synched pair of processors, like used in medical


              drug delivery applications, you would need a reset pin that controls


              startup of the internal CPU state machine, and of course no analog


              to digital processes driving logic, unless re-synched.




              PSOC 1 startup is internally controlled from external voltage Vdd ramp.


              So to just take a low jitter clock and set both PSOCs to external clock would


              not suffice. Thats if you want them both executing the same code at the same


              point in time.








              http://www.cypress.com/?rID=58522      AN73617




              As Bob stated, a more definitive description of what you are trying to do would


              be helpful.




              Regards, Dana.

              • 4. Re: Two PSOC1 chips in synchronization..

                 Thanks for the response. I want to operate Capsense modules of both PSOC chips in synchronization (clock, shield signal are to be in phase). Is that clear enough?

                • 5. Re: Two PSOC1 chips in synchronization..

                  Since CapSense is not a passive process but an active one where some C is charged and measured one PSoC chip will influence the other when using CapSense on the same buttons / sliders. Additionally it will not be guaranteed that both PSoCs come out of reset synchron. So your explanation will not be enough. The remaining question is: What is the idea behind those two PSoCs, what job ( mission are you trying to accomplish this way?