6 Replies Latest reply on Jan 20, 2014 9:25 AM by JoMe_264151

    SPI Master - SS controle

    userc_2428

       Hi guys,

         

      I am implementing an SPI Master to my PSoC 4 project. 

         

      The SPI slave used require the SS to be held low for two clock cycles after each transaction, before bringing it back high.

         

      Has anyone got any suggestions as to how i could do this without using a 'control register' to manipulate the SS line?

         

      All the Best,

         

      Katrine