Some possibilities -
1) Using EOC output of A/D just trigger an ISR and in ISR write the result, byte wide, to
2) Use DMA, to SRAM. and ISR attached to nrq pin of DMA component. Then perform same
as 1) above.
3) Use DMA to SRAM, then use EMIF component. This is a bit of a guess, but possible
hardware only solution, you would have to investigate.
4) Use Verilog solution.
Or even simpler - just do a DMA directly to to output port. Place a register which functions as your port, and then do a peripheral-to-peripheral DMA. Look at AN52705 for an example (tough it uses tha DAC for that)
Simplest would be 1), no additional HW used.
If control register placed, and A/D > 8 bits, takes 2 control registers.
Or DMA to the address of the port DR register(s).
Using a control register allows to use non-adjacent pins (or pins from different ports). When writing directly to the DR, all pins must be of the same port.
Of course writing to non adjacent pins one has to use masking
for any other used pins in the ports being written to. But then that
is also true for use of full PORTXDR if ADC width does not match
port width and there are other used pins in port for other purposes.