1 2 3 Previous Next 39 Replies Latest reply on Nov 6, 2012 10:26 AM by rajendra.prasad

    Peak Detection

    glenn.yeager

      So I read the application note regard peak detection on the PSoC (AN60321) and the Peak and Hold method is exactly what I am looking for, only problem is I can't get it to work at a frequency faster then 4 MHz which it says is due to the mixer being used (The LO cannot exceed 4 MHz). I am trying to measure the peak voltage of a pulse that is about 3 microseconds in duration so I get about 12 samples per pulse (3 microseconds/250 nanoseconds).

         

      Is there any way to get around the 4 MHz macimum LO, or is there an altogether better way to detect peaks at higher frequencies?

        • 1. Re: Peak Detection
          user_14586677

          What is the latency you are seeking, is it the 12 sample width ?

             

           

             

          You can always do a peak detector with fast external OpAmps (2) and fast diodes.

             

           

             

          Or use PSOC VDAC and Comparator, its has 110 nS response time at high power,

             

          and use a binary search algorithim on the VDAC (which feeds one side of the comparator)

             

          to determine peak via comparator trip relative to VDAC setting. If comparator not fast enough

             

          use an external comparator, fast ones are cheap.

             

           

             

          Regards, Dana.

          • 2. Re: Peak Detection
            user_14586677

            One consideration I forgot to mention, VDAC settling time ~ 3 uS, whereas IDAC ~ 200 nS.

               

            Note VDAC settling speced to .1%, but its only 8 bits, so Ts < 3 uS for 8 bits, 1 LSB.

               

             

               

            So in short you could use IDAC to feed your comparator as it is not presenting any significant load.

               

             

               

            Regards, Dana.

            • 3. Re: Peak Detection
              glenn.yeager

              Well, thinking bigger picture here I need a system that I can adapt to also do a peak detection on pulses that are about 5 nanoseconds in duration. Also these pulses may or may not be periodic depending on the source. It is not important that I detect every pulse, however I need to detect enough so that I don't loose any information such as a change in the peak of a pulse.

                 

              I was thinking that I could maybe stretch my pulses so that they are in the milliseconds.

                 

              The end goal is to see how capable the PSoC is so if it can be done on the PSoC I need to figure it out using very few to no external components.

                 

              Dana, if I understand your VDAC+Comparator method I should increase the VDAC output into the comparator until the comparator changes, signaling that my VDAC output is now larger than my analog input. I think take my previous VDAC value and somewhere in between those two values is my peak?

              • 4. Re: Peak Detection
                user_1377889

                Here is an appnote http://www.cypress.com/?rID=41001 concerning peak-detection.

                   

                 

                   

                Bob

                • 5. Re: Peak Detection
                  glenn.yeager

                  Bob, that is the app note I mentioned in my original post, and as I said earlier none of those methods are fast enough for my needs.

                     

                  Dana, what instead of "increasing the VDAC value" I ment something along the lines of your binary search. That is increase the value check the comparator output, either increase it again or decrease it by a smaller amount depending on that value. Is that more correct?

                  • 6. Re: Peak Detection
                    user_14586677

                    The VDAC comparator method. Assume Vref = Vdd/2.

                       

                     

                       

                    You start algorithim at VDAC = Vdd/2, check output (cout), if ccout is false then VDAC

                       

                    is < Vpeak, then output VDAC = 3/4 Vdd, check cout again. If false, output 7/8 Vdd

                       

                    to VDAC, if true output 5/8 Vdd. You keep halfing the increment applied to VDAC

                       

                    up or down until it converges. Makes for a fast sort. Its a form of the bublle up bubble

                       

                    down search algorithim. www.codecodex.com/wiki/Bubble_sort

                       

                     

                       

                    Yiou mentioned earlier 5 nS in the post, I assume thats 5 uS....

                       

                     

                       

                    Regards, Dana.

                    • 7. Re: Peak Detection
                      user_1377889

                      Ooops, I overlooked the AN-link. Sorry

                         

                       

                         

                      Bob

                      • 8. Re: Peak Detection
                        glenn.yeager

                        No, it wasn't a typo I ment 5 nanoseconds but I'm not sure if the PSoC is gonna be capable of that sort of speed unless I can stretch the pulse out.

                           

                        I'm currently trying Dana's method with the IDAC, I'll let you guys know how it goes.

                        • 9. Re: Peak Detection
                          user_14586677

                          The approach I suggested is still challeneged at the uS area, I think it would

                             

                          require a little ASM. That being said its shifts and adds, no heavy math.

                             

                           

                             

                           

                             

                          5 nS peak detection, one approach, lots of latency, is to do equivalent time sampling reconstruction.

                             

                          Like used in scopes with low sample rates but high analog bandwidth. This ap note explains some

                             

                          of it.

                             

                           

                             

                          http://www.tek.com/application-note/real-time-versus-equivalent-time-sampling

                             

                           

                             

                          http://www.co-bw.com/EE__Oscilloscopes/XYXZs_of_Oscilloscopes_Index.pdf

                             

                           

                             

                          Regards, Dana.

                          • 10. Re: Peak Detection
                            user_14586677
                                Then the "easy" way out -   
                               
                                    
                               
                                    
                                   

                            http://www.edn.com/design/analog/4347624/High-speed-peak-detector-uses-ECL-comparator

                               

                             

                               

                            Regards, Dana.

                            • 11. Re: Peak Detection
                              glenn.yeager

                              So this is the code I am using:

                                 

                              currIDAC = IDAC_MAX / 2;
                                  IDAC8_SetValue(currIDAC);
                                 
                                  while(1){
                                          update = 0;
                                          prevFlag = compFlag;
                                          compFlag = Status_Reg_Read();
                                         
                                          //If threshold is less than the peak
                                          prevIDAC = currIDAC;
                                         
                                          if(compFlag == 1){
                                              delta *= 2;
                                              currIDAC += IDAC_MAX/delta;
                                          }
                                          else if(compFlag == 0){
                                              delta *= 2;
                                              currIDAC -= IDAC_MAX/delta;
                                          }
                                          currIDAC += delta;
                                          IDAC8_SetValue(currIDAC);
                                         
                                      LCD_Position(1,0);
                                      LCD_PrintNumber(currIDAC);
                                  }

                                 

                              I can see the IDAC increase and decreas as it should, but it doesn't line up with the pulses.

                                 

                              The IDAC increases for about 3.5 uS until it flatlines at its maximum value where it stays for about 450 uS then it decreases for about 4 uS stays low for about 180 uS then repeats

                                 

                              All I get on the output is either 0 or 255

                                 

                              I tried to have a seperate comparator with a fixed threshold that would output high when a pulse was detected and I tried using this as a trigger to update the value of the IDAC based on the value read from the IDAC's comparator but this had no effect.

                              • 12. Re: Peak Detection
                                glenn.yeager

                                Here is the project if it helps

                                • 13. Re: Peak Detection
                                  user_14586677

                                  Your code does not look right.

                                     


                                  First question, do you have a terminating R on IDAC output ?

                                     


                                  Next question is what is amp of input waveform ? You have to scale IDAC and pulse
                                  signal path such that they match at max Vpulse, to maximize dynamic range and
                                  resolution of the solution.

                                     


                                  Just in case compiler not "aware" use >> and << vs multiplies/divides.

                                     

                                   

                                     

                                  Lets assume the following

                                     


                                  IDAC 0 - 2.04 mA
                                  IDAC R = 600 ohms, therefore full scale = .6 x 2.04 = 1.224 V max pulse amplitude

                                     


                                  We start at 1.02 mA = 0x80, 128 dec, half scale, .612 V

                                     


                                  Pulse amp is 1.0 V

                                     


                                  So first trial is

                                     


                                  1) VDAC = .612
                                  2) comp = low, the pulse is higher
                                  3) So we add last VDAC value + 1/4 VDAC range = .612 + .306 = .918
                                  4) comp = low, the pulse is higher
                                  5) So we add last VDAC value + 1/8 VDAC range = .918 + ( 1.224 / 8 ) = .918 + .153 = 1.071

                                     

                                  6) comp = high, VDAC > pulse

                                     

                                  We know know 1.071 > Vpulse > .918, but we have more resolution than that. Our resolution
                                  is 1.224 / 256 = 4.78125 mV

                                     


                                  7) So we take VDAC value at beginning of last test, and add 1/16 to it
                                  8) comp = .918 + ( 1.224 / 16 ) = .9945
                                  9) comp = low, vpulse > .9945
                                  ..
                                  ..
                                  ..
                                  ..
                                  Work out the same scenario when comp indicates pulse is lower, another switch flag. Its
                                  all part of the same routine. You end when you want to divide (shift) by 512 (9 bits), as
                                  the DAC is only 256 (bits).

                                     


                                  Note some numbers are not precise above, I got lazy just using a calc, not integer math.

                                     


                                  Regards, Dana.

                                  • 14. Re: Peak Detection
                                    user_14586677

                                    I missed your project post, just looked at it. Some questions/observations -

                                       

                                     

                                       

                                    1) Looks like IDAC is not terminated in 600 ohms, it outputs I, but comparator needs V. So

                                       

                                    terminate it.

                                       

                                     

                                       

                                    2) Cascade of PGAs, I assume what you are doing is level shifting the pulse to be in the CM range of

                                       

                                    the comparator ? Here is a technique, attached excle file will help calculate R's needed -

                                       

                                     

                                       

                                          http://electronicdesign.com/article/analog-and-mixed-signal/use-excel-to-calculate-a-d-level-shifter-resistor-.aspx

                                       

                                     

                                       

                                    Regards, Dana.

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