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      • 15. Re: Increasing Voltage Compliance with iDAC and Current Mirror
        ki.leung

         thanks Jram, that's what I was wondering. 

        • 16. Re: Increasing Voltage Compliance with iDAC and Current Mirror
          user_14586677

          The ALD parts pretty interesting, I was not aware of them.

             

           

             

          Looks like overall accuracy will be largely governed by gm mismatc in the mirrors. I would

             

          be curious to know how your spice sims work out regarding this. However the PSOC IDAC

             

          has a 5% error.  But PSOC reference is good to .1%. You could either run a cal routine with

             

          DelSig to alleviate this or use a Vref derived I source/sink, instead of IDAC. Decision governed

             

          by doing an end to end error analysis to see if it meets your goals.

             

           

             

          I assume you will be measuring the Vload having excited tissue with Iload. If you are using

             

          PSOC that of course will violate CM range for pins / A/D, eg. complience needed at load.

             

          Looks like isolated diff amp possibility, gets rid of ground CM as well. Analog Devices

             

          comes to mind.

             

           

             

          Very interesting design.

             

           

             

          Regards, Dana.

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