Hopefully a Cypress expert will comment.
I am not aware of any fitter intelligence that takes into account signal
coupling issues. There is manual control over analog routing, see
The fitter is not "aware" of the signal properties you place on a pin,other than your assignment of pin type.
Basically, ports 0, 3 and 4 have better analog performance. The PSoC are divided into four quadrants, each of which hving its dedicated ports. So if you separate the digital and anlog pions between these quadrants, you can minimize the internal coupling. I gues the analog design viewer can also help here, since it shows the internal routing structure and signal paths.
Thank you All for reply.
I will look at the mentioned AN's and do the pin assigment manually according the recommendations in the AN's.
A pity that Creator doesn't do this job for me. Maybe something for a new release ;-).