1 Reply Latest reply on Feb 28, 2014 7:47 PM by anand.srinivasan.asokan

    FX2LP Slave FIFO full and empty change simultaneously

    lee.carter

       I'm using Cypress's fx2LP slave fifo mode with fpga.

         

      I have send data to fx2lp from fpga , then i check received data.
      I have configured firmware 512*4 for fx2lp.
      But here's problems.

      When i have received the number of 2048 data, then 1 data missing.

      Like the following.

      0 1 2 3 4 ..255 0 1 2 3 4 ..255 0 1 2 3 4 ..255 0 1 2 3 4 ..255 
      1 2 3 4 ..255 0 1 2 3 4 ..255 0 1 2 3 4 ..255 0 1 2 3 4 ..255 0
      2 3 4 ..255 0 1 2 3 4 ..255 0 1 2 3 4 ..255 0 1 2 3 4 ..255 0 1
      ...

      I don't know why this happen?
      Also how can i handle of this problem?