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There's this circuit:
(optionally with more switched capacitors/signals, s1/s2/s3 are digital signals to integrate toghether with the analog signal)
It believe that it's impossible to implement in the psoc1(or even other psoc chips).
Is there some trick to do it ?
Thanks
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PSoC 1
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In PSoC1 you may use the SwitchCapConfig component configured as an integrator and adjust ACap in 32 steps by the use of a control-register.
Have a look into the datasheet.
Bob
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From reading app notes , i understand that each switch in the switched cap block is modulated by phi1/phi2. You can only turn them on or off, but not control them directly from some digital source(say shift register) , right?
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Not quite right. There are switches controlled by phi1/phi2 but there are other switches (mainly those for configuration) that are accessed by writing into a register.
So the question remains: What more than your initial configuration you'd like to solve?
Bob
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In my schematic, the switched caps are modulated by control signals. One way to look at it is they implement a correlation algorithm.for this just a config bit won't be enough.
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The analog column clock is the source for PHI1 and PHI2. It can be selected
from any digital block in the digital array, say a timer, or counter or....and you
control with APIs its divisor in case of a timer/counter, or from some of the fixed
global clocks, like VC1, VC2.
In the below pic the two muxes that control this are DCB33 and the mux feeding the
clock input of the analog column blocks.
Regards, Dana.
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After reading about how the integrator works(AN2041 pg 5) , it does seem that it needs a stable analog clock to do his job properly(transrfer charge from input capacitor to feedback capacitor), and modulation of an analog clock won't work.
Another possible approach is:
1.Take Vin , create -Vin.
For each modulating integrator :
a. Connect Vin, -Vin to an analog mux.
b. Modulate the mux with modulation signal
c. connect the mux output to an integrator
Than sum the integrators toghether.
But :
1. Is ther a summarizer module ?
2. It takes a lot of blocks . I need 16 channels , psoc1 has only 2 analog blocks.
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It seems that you can build the summarizer module only with external parts(ressitors), and the number of channels you cn integrate is a bit limited, but apart from that t'll work.
Any way , thanks guys and especially thanks dana.
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If not proprietary can you answer the following questions ?
1) What are the signal sources ?
2) Signal source BW ?
3) Purpose of the integrator ?
4) Integrator, you trying to set its gain or response ?
5) Once you sum what further processing are you trying to do ?
6) Overall function of the design ?
7) DC and AC accuracy, resolution required ?
This way forum may be able to assist in depth.
Regards, Dana.
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After i sum , i need low-pass filter and adc.
The gain of the integrator doesn't matter. What's an interator response ? .
I just need 16 correlators(integrators controlled by the digital signals) and a summary.
I was just trying to figure out whether psoc could do compressive sensing, don't have all those details - figured if there was a way to build this in psoc , i'll see what are the constraints.
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Compressive sensing is some type of adc which also compresses the data. Has some benefits with regards to power and sample rate.
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The integrator response is the AC response of the integrator.
Compressed ADC, I normally think of a codec like ADC.
When you state correlator, I do not understand how switching an integrator
forms a correlation, other than the output of the integrator is a sampled integrated
version of the input signal, eg. a simple correlation of the integrator response and
swicthing ?
Seems to me, if input signal BW low enough, this is best done in the digital domain by
sampling all signals one at a time, and performing the necessary transform (filter)
on the sample set ? So A/D first, then do all the requisite filtering. Until you know the
signal details the realizability of this approach in question.
Regards, Dana.
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Correlator implements the function integral(Vin*S1). . Since S1 is a digital signal(-1,1) , my original circuit works by chraging the caps while S1=1 , and discharging them while S1=-1. (There might also be a need to discharge the caps at the end of the integrator sampling period, but i forgot about that).
That's the original circuit i've drawn.
Yes it can be done digitally , but doing this in the analog domain could savepower and offer better sampling rates.
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You might find the modulation bit useful for this application, which enables modulation of an analog signal by a hardware digital signal. This is available in Type C Switched Cap blocks - refer page 416 of the PSoC1 TRM:
http://www.cypress.com/?docID=46288
An example usage of the modulation bit for full wave rectifier is below:
http://www.cypress.com/?rID=6134
You can choose a part such as CY8C27/28/29 that have the maximum number(4) of ASC blocks in a single device.
Thanks & Regards,
Prem
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Thanks prem.
The modulation looks very usefull, but since the limit is 4 blocks, it doesn't fit this application.