1st: It can be done.
2nd: It can turn out to be complicated.
I would start with a verilog / datapath object that gets its data written into its FIFO by CPU. When that works, you may send the data through DMA. Depending on the width there are some special aspects of handling that with DMA, but there are appnotes concerning that. Use Keyword Search at top of this page.
Have a deep look into "Components Author Guide" (in your Creator folder) to get the register-names to write to.
Transferring the data from filter to your component then is quite easy (depending on the width and the spokewidth of the DMA-channel, too)
Thanks for your reply. I was just wondering if it is possible to write directly to a register the filter output (I am refering to the component register that you can drag and drop). Then the natural step would be to read that component register from my newly created verilog block. That would make thigns easier since datapath objects would not be needed. What´s your opinion on this approach?
You cannot convert a component-internal register to something routable to do what you want in schematic.
You cannot transfer a register content from one register to another without using CPU or DMA.
The so-called registers are memory locations within a special area and can only be accessed by CPU or DMA.
When you are programming both components you get the chance of creating a bus in verilog and have the transfer performed with signals, but this will not work when the FIFOs are involved.