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Hello,
I need to accurately measure the frequency of a sinusoïde with a tolerance of 0.01 Hz. The master oscillator is set to 24Mhz by an external crystal (low ppm & temp coef.).
Apart from the numerous topics & documentation available on the site, does anybody have a clue or a track for such an accurate measurement?
Regards,
Michel
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I should add that the frequency of the signal is around 340Hz.
Michel
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Not too complicated:
Maxf = 350Hz * 100 = 35kHz measurement frequency, When we double that (Nyquist) we get something like 100kHz.
Signal conditioning and a comparator give a trigger signal for a counter's capture. Counter is counting up, reloaded at capture, interrupt at capture, so there is time enough to get the captured value and do something with it.
Bob
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Pitfall can be the sinus input going below 0V, then a resistor ladder is needed to shift the voltage.
Bob
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You want RESOLUTION to 0.01Hz or ACCURACY to 0.01Hz. These requirment is not the same
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Original post stated "I need to accurately measure the frequency of a sinusoïde with a tolerance of 0.01 Hz."
And of course one can have a spec where resolution = accuracy. Although I
think, in general, resolution > accuracy to effect a real solution.
Regards, Dana.
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Hello,
Thx for these numeous answers even if I had already read these docs or applied the advices you're all mentionning.
I've succeded in getting a 0.3 Hz accuracy around the central frequency with the help of an active band-pass filter (thx to the OpAmp) , but still need to go down to +/-0.01Hz.
I'd like to digitally filter the output from the counter using DMA between the counter fifo & the DFB input in order to have a full harware path.
How/where can I retrieve the address of the counter fifo (UDB) to fill in the source-address fields in the DmaInitialize() & CyDmaTdSetAddress() APIs? AN52705 mentions HI16(CYDEV_PERIPH_BASE), but even in the Counter.h file, I can't find anything related to the LO16 souce address.
By the way, sorry to have posted in this rubric, it's not the most appropriate one.
Michel
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In the Counter.h near line 180 start the definitions of the component's registers. The output FIFO is F0 register and you need the pointer to it for the DMA definition. Remember that only a hardware capture pushes a value into the FIFO.
Bob
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Bob,
In Counter.h:
#elif(CTRFrequence_Resolution <= 16u) /* 16-bit Counter */
#if(CY_PSOC3) /* 8-bit address space */
#define CTRFrequence_STATICCOUNT_LSB (*(reg16 *) \
CTRFrequence_CounterUDB_sC16_counterdp_u0__F0_REG )
Difficult to guess that CTRFrequence_STATICCOUNT_LSB is related to the FIFO (even if @F0/F1 are mentionned as the FIFO registers belonging to the UDB in the TRM).
No matter, thanks a lot.
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I've succeded in getting a 0.3 Hz accuracy around the central frequency with the help of an active band-pass filter (thx to the OpAmp) , but still need to go down to +/-0.01Hz.
That seems odd to me, only .3 Hz. Sure looks like a noisy gate clock to me.
Or the Fx source is not stable. Even a BP filter will add jitter to clock. Using
a DSO you can quickly get a handle on jitter, and histogram it to see what the
Fx and Fg (gate F) look like.
I have a PSOC 1, 32 bit measurement system, 1 Hz gate derived from external
osc, and I typically get 1 ppm flicker at Fx 1 - 5 Mhz.
Whats the Fx derived from ? If a comparator and / or amp in signal path then
PSRR, CMRR, noise all contribute measurement challenges. I use for bulk
caps polymer tants, they are an order of magnitude better f vs Z curves than
regular tants.
Another technique is to stop all other irrelevant processes, like other timers/
counters/DMA to cut down on noise effects on input signal path.
Regards, Dana.