1 2 Previous Next 15 Replies Latest reply on Aug 2, 2014 5:11 AM by DaKn_263916

    PWM h-bridge drive w/ output selection


      Hi folks,


      I'm new to PSoC, but it looks like it might be good for my design, largely by saving a bunch of grief on routing a very small board.


      My question is about the best practice for duplicating functionality that I already have: The current design uses a dsPIC, which has 4x PWM generators, with 2 pins per. The pins can be selected to be digital GPIO, or PWM output, or inverted PWM output.


      I'm driving a TI DRV8833 chip, which has 2 inputs, which are connected to the 2 PWM outputs. For each direction, one of the pins is enabled, while the other is left as a digital GPIO. Switching directions then just switches which one of those output pins is enabled. Then the GPIO sets the coast/brake mode of the motor.


      How should I go about mimicking this funcionality the PSoC 5? For each PWM channel, should I use a single PWM block with the pwm1 and pwm2 routed directly to output pins, and then just setting the cmp1 and cmp2 values will effectively determine which output is acting like a constant high/low GPIO, and which is PWMing?


      The other wrinkle is that we are doing speed sending with a PWM holdoff (95% of the counter period), where the 95% count mark triggers the ADc conversion (differential, across motor). It looks like replicating this functionality means that I'd use one of the cmp1/cmp2 values to set this event at 0.95*period, and then use one of the pwm1/pwm2 outputs to trigger start-of-conversion on the ADC. But if I do that, then I need to figure out the output switching. Just build the output logic with 2 mux's and some logic gates?


      Of course, if I could get this worked out into a whole submodule that has just a duty cycle value register, a direction bit, and a coast/brake bit, that would be super.


      Any advice on this would be appreciated. We chose the previous part originally because it was a "motor control" variant, which made the described application quite straightforward.



        • 1. Re: PWM h-bridge drive w/ output selection

          Welcome in the fascinating world of PSoCs!


          It is not easy to teach you in a small post the complex PSoC5 capabilities which certainly willl cover what your project needs. To start with, I would suggest you to download and install the Creator software www.cypress.com/psoccreator/ which will give you access to all the datasheets of the components availlable. Have a deep look at the PWM, which not only has two outputs, but is able to additionally have a dead-band specified which may help you in driving your motor(s). ADC is straight forward, too and to have a conversion done is triggered by hardware signal, software trigger, both or free running. Just name what you want and you get it.


          There is a bunch of videos to watch (enough for a day and a box of pop-corn) .video.cypress.com/video-library/video/PSoC




          Happy coding!



          • 2. Re: PWM h-bridge drive w/ output selection

            I've been watching and reading through the Training On Demand stuff, it's been very useful.


            Since this is partly an HDL approach to solving the design problem, it's quite the learning curve. I'm so used to having to just figure out how to solve any problem in firmware.


            Here's an attempt to lay out what I was describing: describing: https://www.dropbox.com/sh/eefiultqcz7nsm1/AAA7aV7AGnOlLaBk_OXOpK6Va

            • 3. Re: PWM h-bridge drive w/ output selection

               Or, here as a PDF, easier to take a look at.

              • 4. Re: PWM h-bridge drive w/ output selection

                No, a pdf is not as helpful for analyzing as the project itself. Even better is to use Creator -> File -> Create Workspace Bundle (minimal) and then attach the resulting zip.


                Some comments:


                -PWM's clock frequency is too high, look at datasheet.


                -Seems to be difficult to start the PWMs in the right order with the right timing.


                -Since all PWMs and all T&Hs do the very same job you might think of having a single path with the mux at the beginning




                Yes, "Thinking PSoC" differs a lot from the usual design. Depending on your skill in hardware-design you can burden more of the job to the hardware-side or to the processor side.





                • 5. Re: PWM h-bridge drive w/ output selection

                  I would think about using 1 S/H, with independendent clock, and


                  a mux to implement SAR preconditioning. It may even be possible


                  to eliminate S/H if input cannot move more than 1 LSB due to circuit


                  effects, such as L. Then if it cannot move due to high L relative to SAR


                  conversions time, eliminate S/H.




                  Make the calculations to confirm.




                  Regrads, Dana.

                  • 7. Re: PWM h-bridge drive w/ output selection

                     Thanks for all the input everyone.


                    I've reconfigured some stuff around, and this design seems to use less, make more sense, and not give any errors about analog connections into the sequencing ADC: https://www.dropbox.com/s/iebztyj6o4cpe3g/IP25_PERIPH.cywrk.Archive02.zip


                    If anyone sees anything that doesn't make sense, please let me know!  The idea here is that all 4 PWM periods will be synchronous and equal, and there will be a software limit on how high the PWM can be set, such that the PWM2 spike will always lie in a zone where the output PWM is off.


                    The counter is to cycle through the analog mux, selecting a new channel every PWM period. I wasn't able to connect the outputs of the S&H blocks to the input of a sequencing ADC, as in the previously uploaded design, due to some sort of analog routing constrain. Now the challenge of DMA setup ... 


                    Bob, I'm unsure what you mean by 'start' the PWM's? They'll all be permanently enabled, with left-aligned pulses. Like this:
                    Then, based on the CMP2 value, there will be a software limit on how high (or low, since it's down-count) the CMP1 value will be set.


                    Dana, I will sort through the calcs to figure out if I can connect directly to the ADC, or if I need to retain a S&H stage there.

                    • 8. Re: PWM h-bridge drive w/ output selection

                      Start command looks like -





                      • 9. Re: PWM h-bridge drive w/ output selection

                        You show an 80 Mhz clock going to AMUX, I am sure that is not final value.


                        Its value must accomidate SAR conversion rate + settling time.




                        You might consider a LUT to replace PWM 1, Digital Comparator, and 3 bit counter.


                        Seems like all they are doing can be done by a simple state machine in the form of


                        a LUT.




                        Regards, Dana.

                        • 10. Re: PWM h-bridge drive w/ output selection
                                  Hrm, the forum is giving me some trouble ... no text box in Chrome, and only a teeny one in IE. Shrug. Thanks for the feedback Dana, this is an immense help to me. So, for starting the PWM, I don't think that will be an issue, since the PWM1 duty cycle will be set to 0 (or 2000, or PWM_MAX or whichever, since this is down-counting) upon startup. I haven't put up a proper schematic of my system, but this isn't the standard 3-phase vectoring motor control (although I'd love to see an example of that!). This is just outputing to a TI DRV8833 chip that runs brushed DC motors. So, starting all the PWM's in a off/low state should be fine, even if there is a little delay with their turn-on. But I suppose the workaround to that would be simply to set their enable pins to a dedicated control register, so I can PWM_Start() each unit, then do a single write to the control reg to enable all? For the clock into the AMUX, if I feed it 80 Mhz, will it continually make and then break the connection? If this is the case ... hrm, I'm stumped on how to implement that, since I'll need to generate two full pulses, triggered from the PWM terminal count. I just want it to switch inputs to the AMUX for every PWM period. So then the motor BEMF line is connected to the ADC, and then the SAR is fired during the PWM off-time, and internally clocked fast enough that the 18 cycles will occur before the next PWM period starts.   
                          • 11. Re: PWM h-bridge drive w/ output selection

                            The basic ide of using 1 S/H looks like -




                            1) Mux is switched to a channel.


                            2) Allow small settling time and time for S/H to acquire to 1/2 lsb of 12 bits.


                            3) SAR, if running continuously, take 2 samples, throwing away the first.


                            4) Change mux to next channel, repeat 2 - 4.




                            So mux is driven by basic desired sample rate you want all 4 measurements to occur in.


                            Note do not reset S/H or be concerned about that. If you did that would un-necessarily increase


                            settling time. Just allow it to slew/settle from last acquired value.




                            Note the settling time of S/H will be primary limitation, notice its only to 1 % in spec, at 12 bits


                            you are trying to settle to 1/2 LSB (you determine how tight this has to be) so thats ~ .01 %.


                            You can tradoff the resolution needed to improve error due to settling time.




                            Regards, Dana.




                            • 12. Re: PWM h-bridge drive w/ output selection

                              The small text-box in IE gave me trouble for some months! Setting the compatibility mode instantly solved the problem.


                              Using chome has another issue: When attaching a file this mostly won't work.





                              • 13. Re: PWM h-bridge drive w/ output selection

                                In IE goto settings, "Compatibility View Settings", and tick off





                                1 2 Previous Next