to find and test the solution I need to know the connection of your 8Mbit RAM (1Mx8). Please can you publish your schematics.
Enrique33 posted on 11 Apr 2014 12:20 AM PST
3 Forum Posts
First note: the DMA can do only 4095 bytes (yes, thats right, its not 4096...) per single transaction. So you need to handle that first.
To get more than 64k of transfer, you can used an indexed / chained DMA configuration: http://www.cypress.com/?rID=39408&cache=0
That way you can modify the TD automatically.
dvorakvik, the schematic is pretty simple, an aynchronous EMIF component (24 bit addr, 8 bit data),an external SRAM 1Mx8, and an external 8 bit ADC connected to a Psoc Port.
I'll have to look more deeply into it but the Indexed DMA will probably do.
Am I right -- indexed DMA is impossible on PSOC5 in a single TD chain when destination is SRAM, since HI16 of SRAM address and TD (0x400..... base) address is different?