6 Replies Latest reply on Aug 7, 2014 6:14 PM by MiSi_284936

    PSoC3- SPI master swapping nibbles


       Seldom have issues with SPI, just plug and go.


      This time have a SPI bi-directional master at a lowly 3Mbps. Leave it in transmit mode until need to turn it around.


      Was occasionally getting hang ups with the slave. Hooked up an analyzer on the downstream data and what should be a consistent string of 0x020b, 0x5000; 0x022b, 0x5000 would get changed around to 0x50b, 0x0200, 0x052b, 0x0200.


      In essence it's swapping nibbles !


      My code is really simple and just use delays right now between words. Was leaving the rest for the real programmers.


      Just downloaded SP1, but see the SPI master is still v2.4 so doubt anything new there.


      Attached pdf show analyzer traces, code, and schematic segment.


      Any advice ?




      Mike S.

        • 1. Re: PSoC3- SPI master swapping nibbles



          1. What is the mode of pin 64, your SDAT  line seems to have a longer RC time than the SCLK.


          2. Did you have anything connected to the SDAT when doing the measurement. Try to have it disconnected and see if that changes.


          3. on your pdf file, the first picture shows a small spike on SDAT at the beginning of the 1st packet. Was it from outside circuits?


          4. Try to slow down the speed and see if that makes any changes? 

          • 2. Re: PSoC3- SPI master swapping nibbles

             Hi, thanks.


            1) SDAT for being bidirectional is set for resistive pull up, also a 10k pull up on it. Zooming up its at 4v at the rising clock edge, so would be more than fine for the slave. Show pics connected and not in attached revised pdf.


            2) yes the slave was connected via 2inch flex cable. Removed it and took another pic. Virtually no difference.


            3) Didn't give much thought to that transient since out of timing region of interest, figured that was from line tristated then lifted a bit with pull up.


            4) Will give going slower a try, but since set for high speed, figured 3Mbps slow enough thats its something else.


            Have two other SPI's in PSoc talking to DAC, and digital pot. Don't use them nearly as much, but haven't had known issue.


            Tried going from bidirectional to just output, and same outcome.


            Attached revised.



            • 3. Re: PSoC3- SPI master swapping nibbles

              1. I think the SDAT should use strong drive, but this is not your problem at this time.


              2. for the swaping problem, how about this

                   instead of   
                    ldriver(0x020b, 0x5000);   
                   ldriver(0x022b, 0x5000);   
                   void test1(void)   
                   void test2(void)   

              Just to see if that changes anything

              • 4. Re: PSoC3- SPI master swapping nibbles

                Thanks again. Had actually tried that earlier, and no difference. And can't have SDAT as strong drive since need it bidirectional.


                Went back to a "working" archive, tested that, and was still working, no upset in SPI transmission.


                Updated just the C code to add my new commands, and it works too. Important to note just did BUILD, not clean and build.


                Looked into the generated source code for the problem SPI module, and even though both versions set the same, in the working version, the following are NOT enabled:

                        void SPIM_3_TxDisable(void)    
                            SPIM_3_CONTROL_REG &= ((uint8) ~SPIM_3_CTRL_TX_SIGNAL_EN);   
                    In the non-working one the lines are enabled (which makes more sense to me).   
                    Since have working and non-working versions, will open a case, and include both code sets.   
                    Need to get this fixed, or abandon the SPI altogether and do discrete implementation.   
                    Don't need fifo, don't need interrupts, just need it to work reliable.   
                • 5. Re: PSoC3- SPI master swapping nibbles

                   Opened a case friday, haven't heard back yet.


                  Have a work around by taking the SPI bidirectional 16 bit and made it one 8bit output only, with a 8 bit shift register to read back.


                  Numerous clean and builds and still works, just takes a little longer.


                  Still want to know why, so can go back once the blame thing works right.

                  • 6. Re: PSoC3- SPI master swapping nibbles

                     Tech support did find an issue with the SPI16.


                    "The suspected problem is, when you do SPIM_WriteTxDate(0xABCD), initially 0xCD will be written to LSB FIFO and 0xAB is written to MSB FIFO.

                        If there is a delay between these writes, then before the MSB FIFO is updated, SPI stars transmitting with MSB value as previous value.   
                        It is the same what you are seeing. In your case, USB interrupt is causing this delay.   
                        We manually gave a delay between the two writes and could see this issue (With a very simple SPIM project, no USB).   
                        By changing the verilog file, we will be waiting till the MSB FIFO is updated and then we are transmitting the data.   
                        We found to be working on our side.   
                        So, please check on your side and let me know what you see.   
                        Editing the vhdl of the component did fix it. But until the fix gets officially released, safer to use an 8bit SPI.