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1. Re: Ganging nvSRAMs, vswitch threshold tolerance
ravip_71 Aug 11, 2014 7:17 AM (in response to patrick.weeks)HSB pin ganging is not recommended in STK14CA8 (which is a 0.25 micron technology part that was made obsolete 3 years back). In the current generation 0.13 micron 1Mb nvSRAM part CY14B101LA, ganging is allowed. I have placed the reasons in the responses to your numbered questions.
#1. You are right that the VSWITCH is not the same in all devices. However, please note that the VCAP specified is such that it can supply the AutoStore current for the duration of the store time in worst case conditions. Since you have increased the ganged VCAP to 5 times of what is recommended for a single device, it does not matter when each part goes into AutoStore. The charge in the capacitor will be sufficient to provide store current for the 5 devices irrespective of whether all the devices start store at the same time or if each device starts store at different times.
#2: Yes, I/Os get inhibited immediately when VCC crosses VSWITCH. Since VSWITCH level is a max level, application should ensure that read writes are not done below 2.7V. If you continue to write, then the data written into the different devices will be different since each device will continue to write until its VSWITCH is crossed.
#3: In STK14CA8 HSB ganging should not be done. This is because a LOW on the HSB pin input will internally pull the HSB pin LOW - when there has been a write to the SRAM, HSB will stay LOW for the store cycle duration and when there has been no write to the SRAM, HSB will still be pulled LOW internally for tDELAY time. Therefore, when parts are ganged, a HW store initiated by pulling the HSB pin LOW can hold the HSB pin LOW indefinitely. The device which completes the store first will release the HSB pin but the other devices are holding the pin LOW. For the first device, this is a condition of HW store where no write has occurred. Internally, its HSB pin gets pulled LOW for tDELAY time. This can go into a loop with each device initiating a HW store in the other devices. In CY14B101LA, this will not happen since a LOW on HSB will not pull HSB LOW internally when there has been no write to the SRAM. Hence ganging of HSB is allowed in the case of CY14B101LA. However, please note that AutoStore disable feature should not be used when ganging. This is because, when the HSB pin of the device with higher VSWITCH goes LOW during power down, it could initiate a HW store in the device for which VDD has not crossed VSWITCH.
#4. Ganging is allowed in STK14C88 which is an older, 0.8 micron technology part and not in STK14CA8. Hence ganging was never recommended in STK14CA8.
Regards
Ravi
Cypress Applications
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2. Re: Ganging nvSRAMs, vswitch threshold tolerance
patrick.weeks Aug 12, 2014 9:53 AM (in response to patrick.weeks)Very good. Thank you for the explanation. It is most appreciated !