2 Replies Latest reply on Sep 4, 2014 2:20 PM by user_78878863

    SPI Slave Hold time violation

    user_62720120

      I am trying to use the SPI Slave component, but I keep getting Setup / Hold violations. My schematic contains only the SPI Slave component, two DMAs for it, and the necessary digital input and output pins. It is being fed by the Bus clock.

         

       

         

      I have tried two different speeds for the bus clock, 24MHz and 64MHz. Both give warnings. What am I doing wrong?

         

      Hugo

         

       

         

       

         

      24MHz: Hold time violation found in a path from clock ( CyBUS_CLK ) to clock ( SCLK_1(0)/fb )

         

       

         

      64MHz:   Setup time violation found in a path from clock ( CyBUS_CLK ) to clock ( CyBUS_CLK )

         

        Hold time violation found in a path from clock ( CyBUS_CLK ) to clock ( SCLK_1(0)_SYNC/out )