I think the CSD CapSense datasheet explains the concept better than I could express that. Search the PDF for "diplexing" to find the areas of concern. When you have any additional questions, don't hesitate to ask.
There are extended docs here -
Cypress recommends reading the following documents before implementing a CapSense design using
the SmartSense_EMC User Module. These documents are available at the Cypress Semiconductor
CY8C20x66 Series PSoC Mixed Signal Array Technical Reference Manual, section: CapSense Sys
CY8C20X36A/46A/46AS/66A/66SA/96A family device datasheet
Getting Started with CapSense
CY8C20xx6A/H CapSense Design Guide