5 Replies Latest reply on Oct 22, 2014 8:43 AM by user_14586677

    Components for producing ASK

    user_343349849

      I have a project that needs to output a 125 kHz signal, modulated by 2400 Baud data stream.

         

      Before I reort to bit-bashing the application, I thought I would see if there might be a simpler way to do this uing internal components. 

         

      The physical output needs to have the 125 kHz ASK modulated waveform appearing in in a push-pull fashion on 2 pins (one pin is high whiel other is low. This is ok, I can use a NOT gate for second pin.

         

      When the system is not sending data, I need an ENABLE output.

         

      I was hoping I could have an enable function internally that set a 125 kHz generator of some sort running (clock/PWM ?)

         

      as well as the enable signal appearing on a digital output. The generator output would appear at 2 pins when enabled and producce hi/low transitions at 125 kHz (one pin will produce high/low and other low/high).

         

      Then some way of applying a stream of Data (2400 Baud) to modulate the generator on and off.

         

      Any ideas much appreciated

         

      thsnks

        • 1. Re: Components for producing ASK
          user_14586677

          If you are trying to implement the pic shown below -

             

           

             

          1) Given carrier is 125 Khz easiest way to gen carrier would be internal OpAmp

             

          and external RC to gen sinewave to be gated, say using wien bridge or some

             

          other stable oscillator. Plan on using JFET in osc loop to stabilize amplitude. Note

             

          if lower freq, say 10 Khz or less, then you could have used wavedac to gen the

             

          sine.

             

           

             

          Another way to gen carrier would be use clock to gen 125 Khz, and then OpAmp

             

          BP filter, Sallen Key, using on board OpAmp and external RC to extract fundamental

             

          from clock. This might actually be better/easier solution.

             

           

             

          2) Simply gate the osc with analog switch/mux. Maybe use a comparator to

             

          synch switching to some ref level, like 0 V or Vdd/2.

             

           

             

          Regards, Dana.

             

           

             

          • 2. Re: Components for producing ASK
            user_343349849

             Thanks Dana,

               

            The outputs will be digital and not require filtering as they are driving an "H-Bridge". (4 Fets driving the load).

               

            I did look at the FSK example and see I should be able to drop down a UART with TX going to a gate that enables the 125 kHz signal to be switched on and off. Then a NOT gate will give me oppp polarity output.

               

            The enable digital OP pin will switch off the drivers so probably just a digital OP will do for that.

               

            One other question I had, I need to manchester encode the 2400 Baud serial data. Can I run output from the UART into a lookup table for use the DMA somehow? Each "1" needs to be sent as "1" -> "0" transition and each "0" and a "0" -> "1".

               

             

               

            I must say, I am LOVING these PSOCS and am working through my project converting all the PIC32 to PSOC.

               

            I have had that much trouble with PIC32 -> Long lead times on devices, broken previous code when they update compilers and heaps of silicon errors (even third generation silicon had a stupid error where if you use a constant from flash and get an interrupt , the chip produces a DBE, bus error). Hopefully, none of these issue plague the PSOC. 

            • 3. Re: Components for producing ASK
              user_14586677

              Manchester code -

                 

               

                 

                  

                 

                        

                 

              http://www.cypress.com/?rID=55345

                 

               

                 

              I have had that much trouble with PIC32 -> Long lead times on devices, broken previous code when they update compilers and heaps of silicon errors (even third generation silicon had a stupid error where if you use a constant from flash and get an interrupt , the chip produces a DBE, bus error). Hopefully, none of these issue plague the PSOC. 

                 

               

                 

              No one is perfect here, but in general when component updates are made, if

                 

              they impact a design, simply use the un-updated component. Insofar as compiler

                 

              updates, PSOC 4, 5LP are ARM based, GNU/GCC, so updates are in the hands

                 

              of the cloud. So far minimal change impact. Silicon errors, very very few, but keep

                 

              in mind you are dealing with FPGA like capabilities, and routing impacts timing. So

                 

              if you choose to do mixed design using Verilog you may have to accomidate the

                 

              timing analyzer.

                 

               

                 

              Regards, Dana.

              • 4. Re: Components for producing ASK
                user_343349849

                 Dana,

                   

                OK, I implemented the components and it appears to compile ok, I will try it on the kit in the morning. I used the RS485 Enable option on the UART to provide external enable function that now will be applied when I send data and diabled when stop.

                   

                I have a TX only uart connected to a MUX. Input a of Mux is connected to 125 hKz clock and input 0 to "0" logic level.

                   

                The output of the mux goes to a digital ouput pin and a NOT gate. The output of the not gate goes to another output pin.

                   

                Gee, if this works, I haven't written a line of code yet.

                   

                If I learn how to use the DMA then maybe I can place the packet I want to send into the DMA and manchester encode it as I go. Then direct DMA to UART?

                • 5. Re: Components for producing ASK
                  user_14586677

                  From the first ap note -

                     

                   

                     

                  3. How do you use DMA with communication protocols such as UART, SPI etc.?

                     


                  When using communication protocols such as UART and SPI with DMA, set the buffer size to 4 or less so that internal
                  interrupts are not triggered for data transfers . Use hardware FIFO pointers as read and write data addresses for the DMA
                  and trigger the DMA using FIFO level status configured as interrupts. Make the Hardware Request of the DMA channel as
                  level triggered in order to use it with FIFO levels


                     

                      

                     

                            

                     

                  http://www.cypress.com/?rID=37793     AN52705     Getting Started with DMA

                     

                  http://www.cypress.com/?rID=82680     AN84810     PSoC® 3 and PSoC 5LP Advanced DMA Topics

                     

                  http://www.cypress.com/?rID=44335     AN61102 PSoC® 3 and PSoC 5LP - ADC Data Buffering Using DMA

                     

                  http://video.cypress.com/video-library/search/dma/     Videos on DMA

                     

                  https://www.youtube.com/results?search_query=dma+psoc Videos on DMA (some overlap)

                     

                   

                     

                  Regards, Dana.