The QSG Appendix describes holding down the BOOT_ROM switch during reset to put the board into a known state for recovery.
This procedure prevents the on-board ARM from being able to access the EEPROM that is on the module. Upon boot, the ARM reads the contents of the EEPROM (and in the case of pressing the button, the read of the actual content is negated due to the switch pulling the internal EEPROM SDA line "high") and since it does not find a valid image, it enters its 'programming' mode.
In looking at the SDA line "inside" the module, it appears to get connected to Pin 22 - outside- of the module. By chance do you have Pin 22 brought out to a test point where you can assert it high (to VDDIO) during boot?
I don't know if this actually works, ... just speculating.
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Per the TAG board schematic provided within the SDK (Doc/Schematics/BCM920732TAG_Q32/), your logic seems correct in that the ROM switch (SW5) on the TAG Board (SOC based) applies VDDIO to the SDA pin on the EEPROM, preventing the device from reading the image stored in the EEPROM and forcing it into programming mode.
Pin 22 is SDA on the module, so a similar approach should provide the same result:
I can certainly make pin 22 connect to VCC, but I guess my concern is tying the pin directly to VCC. (Even if it is only for a short time!)