UART with hardware CRC

[Anonymous]

I feel like this should be a common question, but have been unable to find hardly any reference to the problem.  The UART CRC outputs shift LSb first, the CRC is designed to take MSb first.  Has anyone come up with an efficient way to make them compatible in hardware?  Do I need to do a double write to the UART TX buffer and an SPIM to shift MSb first into the CRC?  I need to be able to send data via DMA also.  Not sure if I could handle the double write with the DMA.  Short of creating my own verilog component, is there a good solution to this problem?

[Anonymous]

Are you using the creator or the designer? 

[Anonymous]

 Creator

[Anonymous]

 Obviously, I could just push the data through the CRC LSb first and as long as I'm doing the same thing on the other end, everything is ok, but the problem is that sometimes I have to use the hardware CRC, sometimes a lookup table, and both methods have to give me the same result as the Maxim 1-Wire CRC.  I guess my basic question is this:  Is there a way to arrive at the same CRC value using either an LSb first or MSb first LFSR?  I thought, perhaps, just by modifying the polynomial, or simply reversing the bit order of the final CRC value it would work, but it doesn't appear that is the case.

[Anonymous]

 I think I've gone through all of this before, but I'm not finding it because it was on the PSoCDeveloper forum (which was a much nicer forum *clears throat*).  It looks like the maxim 1-wire CRC is LSb first.  I guess I'll just build my own LSb first CRC component unless I want to reverse the bit order of each byte, run it through the CRC and then reverse the bit order of the CRC result.  Not sure why I have such trouble wrapping my head around CRCs.  There are so many variation.

[Anonymous]

I used the PSoC1 CRC with an UART and it is working fine. The CRC generator of PSoC3 and 5 seems to be same so I would think that should not be a problem but I having use that on PSOC3/5 myself.

   

However I remembered that I have to change the polynomial to get the correct answer,( it has to mirrored or reverse, cannot be sure)

   

I do not have the old software on hand so may be able to check that some time next week. But you can issue a support case and the Cypress application support should be able to give you the answer.

[Anonymous]

Did you used the poly generated by the creator or you loaded it your self. If you check the CRC module of PSoC1 you should see the the CRC loaded into the module is not the same as the polynomial given by the book, it has 1 bit added to the top most bit and shifted left by 1 bit. Also, once you done the CRC usign the hardware, read the value back from the UM and reverse the bit order. ie bit 0 becomes bit15 and bit 1 becomes bit 14...